Datasheet ADR1001 (Analog Devices) - 7

HerstellerAnalog Devices
BeschreibungOven-Controlled, Buried Zener, Precision Voltage Reference
Seiten / Seite21 / 7 — ADR1001. ABSOLUTE MAXIMUM RATINGS. Table 5. Absolute Maximum Ratings. …
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ADR1001. ABSOLUTE MAXIMUM RATINGS. Table 5. Absolute Maximum Ratings. THERMAL RESISTANCE. Parameter. Rating

ADR1001 ABSOLUTE MAXIMUM RATINGS Table 5 Absolute Maximum Ratings THERMAL RESISTANCE Parameter Rating

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ADR1001 ABSOLUTE MAXIMUM RATINGS Table 5. Absolute Maximum Ratings THERMAL RESISTANCE Parameter Rating
SUPPLY VOLTAGES Thermal performance is directly linked to PCB design and operating HTR_IN to HTR_GND (Substrate)1 8 V to 36 V environment. Close attention to PCB thermal design is required. VIN to HTR_GND (Substrate)1 36 V
Table 6. Thermal Resistance
VIN to REF_GND 36 V
Package Type θJA θJC Unit
REF_GND to BUF_GND −0.3 V to +0.3 V E-20-1 PRECISION RESISTOR-DIVIDERS 2-Layer JEDEC Board 120 N/A °C/W VDIN to REF_GND 12 V Evaluation Board 140 N/A °C/W VDOUT to REF_GND 8 V VDOUT to VDIN 4 V
ELECTROSTATIC DISCHARGE (ESD) RATINGS
TSET (REF_GND − 0.3 V) to The following ESD information is provided for handling of ESD-sen- (REF6P6_F + 0.3 V) sitive devices in an ESD-protected area only. INV2 to INV1 −0.3 V to +8 V OUTPUT BUFFER2 Human body model (HBM) per ANSI/ESDA/JEDEC JS-001. BUF_INP to BUF_S Maximum Differential 15 V Field induced charged-device model (FICDM) per ANSI/ESDA/JE- BUF_INP and BUF_S Maximum Input 5 mA DEC JS-002. Current BUF_F to INV2 −0.3 V to +8 V
ESD Ratings for the ADR1001
PWRGD to REF_GND 36 V
Table 7. ADR1001, 20-Terminal LCC
TEMPERATURE Storage Range −65°C to +150°C
ESD Model Withstand Threshold (V) Class
Operating Range −40°C to +130°C HBM ±2000 2 Junction Range −40°C to +130°C FICDM ±1000 C3 Lead, Soldering (10 sec) 300°C
ESD CAUTION
LATCHUP 100 mA
ESD (electrostatic discharge) sensitive device
. Charged devi- 1 HTR_GND must be the lowest potential on the chip to prevent the forward bias ces and circuit boards can discharge without detection. Although of the substrate junction. this product features patented or proprietary protection circuitry, 2 BUF_F cannot go below REF_GND (inverting function). If a negative reference damage may occur on devices subjected to high energy ESD. is desired, see Figure 47. Therefore, proper ESD precautions should be taken to avoid Stresses at or above those listed under Absolute Maximum Ratings performance degradation or loss of functionality. may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operat- ing conditions for extended periods may affect product reliability.
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Document Outline Features Applications General Description Functional Block Diagram Specifications 6.6 V Reference Characteristics Heater Amplifier Electrical Characteristics 5 V Output and Buffer Electrical Characteristics Voltage Divider Characteristics Absolute Maximum Ratings Thermal Resistance Electrostatic Discharge (ESD) Ratings ESD Ratings for the ADR1001 ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Buried Zener Reference Loop Thermal Regulator Heater Current Limiting Setting the ADR1001 Operating Temperature Precision Voltage Divider and Output Buffer Power Good External Resistor Sensitivity Capacitors Noise Performance Electromechanical Stability Solder Heat Resistance (SHR) Shift Applications Information Basic Connections Outline Dimensions Ordering Guide Evaluation Boards