Datasheet ADG774 (Analog Devices) - 8
| Hersteller | Analog Devices |
| Beschreibung | CMOS 3 V/5 V, Wide Bandwidth Quad 2:1 Mux |
| Seiten / Seite | 12 / 8 — ADG774. Test Circuits. IDS. IS (OFF). ID (OFF). ID (ON). RON = V1/IDS. … |
| Dateiformat / Größe | PDF / 139 Kb |
| Dokumentensprache | Englisch |
ADG774. Test Circuits. IDS. IS (OFF). ID (OFF). ID (ON). RON = V1/IDS. 0.1. VIN. VDD. 50%. OUT. 90%. VOUT. 100. 35pF. OFF. GND. S1A. S1B. DECODER
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Textversion des Dokuments
ADG774 Test Circuits IDS V1 IS (OFF) ID (OFF) ID (ON) S D S D S D A A A VS VD VS VD VS RON = V1/IDS
Test Circuit 1. On Resistance Test Circuit 2. Off Leakage Test Circuit 3. On Leakage
5V 0.1 F 3V VIN VDD 50% 50% V S D OUT 90% 90% VS RL CL VOUT IN 100 35pF t t ON OFF EN GND
Test Circuit 4. Switching Times
5V 0.1 F VDD 3V S1A VIN V 50% 50% D1 OUT 0V S1B VS RL CL V V 50% 50% OUT S 100 35pF VS DECODER EN tD tD GND
Test Circuit 5. Break-Before-Make Time Delay –8– REV. C Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN CONFIGURATION TERMINOLOGY Typical Performance Characteristics Test Circuits OUTLINE DIMENSIONS Revision History
Test Circuit 1. On Resistance Test Circuit 2. Off Leakage Test Circuit 3. On Leakage
5V 0.1 F 3V VIN VDD 50% 50% V S D OUT 90% 90% VS RL CL VOUT IN 100 35pF t t ON OFF EN GND
Test Circuit 4. Switching Times
5V 0.1 F VDD 3V S1A VIN V 50% 50% D1 OUT 0V S1B VS RL CL V V 50% 50% OUT S 100 35pF VS DECODER EN tD tD GND
Test Circuit 5. Break-Before-Make Time Delay –8– REV. C Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN CONFIGURATION TERMINOLOGY Typical Performance Characteristics Test Circuits OUTLINE DIMENSIONS Revision History