Datasheet L99H92 (STMicroelectronics) - 4

L99H92 Pins description Figure 3. Pinout - QFN 32 32 GH2 SH2 GL2 SL2 SL1 GL1 SH1 GH1 1 VDH CSI2- CP2- CSI2+ CP2+ CSI1- CPOUT CSI1+ CP1+ EN CP1- CSO1 FSINB CSO2 VS DIAGN SDI GND VDD SDO CSN CLK DIR/IN2 PWM/IN1
GADG120920221236SA
1.3 Pins description Table 1. Pin definitions and functions Pin Name Description
1 VDH High-side drain connection 2 CP2- Charge pump stage 2 negative connection 3 CP2+ Charge pump stage 2 positive connection 4 CPOUT Charge pump output 5 CP1+ Charge pump stage 1 positive connection 6 CP1- Charge pump stage 1 negative connection 7 FSINB Fail-safe input not 8 VS Power supply input 9 GND Ground connection 10 VDD 3.3 V/5 V supply for I/Os and current sense amplifiers output stage 11 PWM/IN1 PWM input or leg 1 input 12 DIR/IN2 Direction input or leg 2 input 13 SDO SPI serial data output 14 CSN SPI chip select not 15 CLK SPI serial clock 16 SDI SPI serial data input 17 DIAGN Diagnostic output not 18 CSO2 Current sense amplifier 2 output 19 CSO1 Current sense amplifier 1 output 20 EN Enable input 21 CSI1+ Current sense amplifier 1 positive input 22 CSI1- Current sense amplifier 1 negative input
DS14069
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Rev 4 page 4/77
Document Outline L99H92 Features Applications Description 1 Block diagram and pins description 1.1 Block diagram 1.2 Pinout 1.3 Pins description 2 Device description 2.1 Supply pins 2.1.1 VS overvoltage warning (VSOVW) 2.1.2 VDH overvoltage (VDHOV) 2.1.3 VDH undervoltage (VDHUV) 2.1.4 VDD overvoltage (VDDOV) 2.1.5 Digital input/output overvoltage (DIOOV) 2.1.6 Power-on reset (POR) 2.2 Standby mode (EN) 2.3 Active mode (OUTE) 2.4 Thermal warning and thermal shutdown (TW/TSD) 2.5 Charge pump (CPOUT) 2.6 Gate drivers 2.6.1 Outputs driving signals (PWM/IN1 and DIR/IN2) 2.6.2 Slew rate control (SLEW) 2.6.3 Short circuit detection / drain-source monitoring (DSHS/DSLS) 2.6.4 Programmable cross current protection time (DT) 2.7 Diagnostic in off-mode (O1DS/O2DS) 2.8 Fail-safe output switch-off input not pin (FSINB) 2.9 Diagnostic not output (DIAGN) 2.10 Current monitors 2.11 Window watchdog (WDG) 3 Application 4 Serial peripheral interface (SPI) 4.1 ST SPI 4.1 4.1.1 Physical layer 4.1.2 Clock and data characteristics 4.1.3 Communication protocol 4.1.4 Address definition 5 Electrical characteristics 5.1 Absolute maximum ratings 5.2 ESD protection 5.3 Thermal data 5.4 Electrical characteristics 5.4.1 Supply, supply monitoring 5.4.2 Power-on reset 5.5 Charge pump 5.6 Full-bridge driver 5.7 VDS monitoring thresholds 5.7.1 Open-load monitoring external full-bridges 5.8 Current sense amplifiers (CSA) 5.9 Fail-safe switch-off input FSINB 5.10 Enable 5.11 DIAGN 5.12 Watchdog 5.13 SPI electrical characteristics 5.14 Oscillator 5.15 Operating modes 6 SPI registers 6.1 Global status byte GSB 6.2 Register map overview 6.3 Status registers 6.4 Control registers 7 Package information 7.1 QFN32L 5x5 mm package information 7.2 TQFP32L 7x7 mm package information Revision history