Datasheet ESP32-C6 (Espressif) - 4

• L1 cache: 32 KB • Timers: • ROM: 320 KB – 1 × 52-bit system timer • HP SRAM: 512 KB – 2 × 54-bit general-purpose timers • LP SRAM: 16 KB – 3 × digital watchdog timers • Supported SPI protocols: SPI, Dual SPI, Quad – 1 × analog watchdog timer SPI, QPI interfaces that allow connection to flash and other SPI devices off the chip’s package Power Management • Flash controller with cache is supported • Fine-resolution power control through a selection • Flash in-Circuit Programming (ICP) is supported of clock frequency, duty cycle, Wi-Fi operating modes, and individual power control of internal Advanced Peripheral Interfaces components • Four power modes designed for typical • 30 × GPIOs (QFN40), or 22 × GPIOs (QFN32) scenarios: Active, Modem-sleep, Light-sleep, • Analog interfaces: Deep-sleep – 1 × 12-bit SAR ADC, up to 7 channels • Power consumption in Deep-sleep mode is 7 µA – 1 × temperature sensor • Low-power (LP) memory remains powered on in • Digital interfaces: Deep-sleep mode – 2 × UART Security – 1 × Low-power (LP) UART • Secure boot - permission control on accessing – 2 × SPI ports for communication with flash internal and external memory – 1 × General purpose SPI port • Flash encryption - memory encryption and – 1 × I2C decryption – 1 × Low-power (LP) I2C • 4096-bit OTP, up to 1792 bits for users – 1 × I2S • Trusted execution environment (TEE) controller and access permission management (APM) – 1 × Pulse count controller • Cryptographic hardware acceleration: – 1 × USB Serial/JTAG controller – AES-128/256 (FIPS PUB 197) – 2 × TWAI® controller, compatible with ISO 11898-1 (CAN Specification 2.0) – ECC – 1 × SDIO 2.0 slave controller – HMAC – LED PWM controller, up to 6 channels – RSA – 1 × Motor Control PWM (MCPWM) – SHA – 1 × Remote control peripheral (TX/RX) – Digital signature – 1 × Parallel IO interface (PARLIO) – Hash (FIPS PUB 180-4) – General DMA controller, with 3 transmit • External Memory Encryption and Decryption channels and 3 receive channels (XTS_AES) – Event task matrix (ETM) • Random Number Generator (RNG) Espressif Systems 4 ESP32-C6 Series Datasheet v1.0 Submit Documentation Feedback Document Outline Product Overview Features Applications 1 ESP32-C6 Series Comparison 1.1 Nomenclature 1.2 Comparison 2 Pins 2.1 Pin Layout 2.2 Pin Overview 2.3 IO Pins 2.3.1 IO MUX and GPIO Pin Functions 2.3.2 LP IO MUX Functions 2.3.3 Analog Functions 2.3.4 Restrictions for GPIOs and LP GPIOs 2.4 Analog Pins 2.5 Power Supply 2.5.1 Power Pins 2.5.2 Power Scheme 2.5.3 Chip Power-up and Reset 2.6 Strapping Pins 2.6.1 SDIO Sampling and Driving Clock Edge Control 2.6.2 Chip Boot Mode Control 2.6.3 ROM Messages Printing Control 2.6.4 JTAG Signal Source Control 2.7 Pin Mapping Between Chip and Flash 3 Functional Description 3.1 CPU and Memory 3.1.1 HP CPU 3.1.2 LP CPU 3.1.3 Internal Memory 3.1.4 Off-package Flash 3.1.5 Address Mapping Structure 3.1.6 Cache 3.1.7 TEE Controller 3.1.8 Access Permission Management (APM) 3.1.9 Timeout Protection 3.2 System Clocks 3.2.1 CPU Clock 3.2.2 Low-Power Clocks 3.3 Analog Peripherals 3.3.1 Analog-to-Digital Converter (ADC) 3.3.2 Temperature Sensor 3.4 Digital Peripherals 3.4.1 Universal Asynchronous Receiver Transmitter (UART) 3.4.2 Serial Peripheral Interface (SPI) 3.4.3 I2C Interface 3.4.4 I2S Interface 3.4.5 Pulse Count Controller (PCNT) 3.4.6 USB Serial/JTAG Controller 3.4.7 TWAI Controller 3.4.8 SDIO 2.0 Slave Controller 3.4.9 LED PWM Controller 3.4.10 Motor Control PWM (MCPWM) 3.4.11 Remote Control Peripheral 3.4.12 Parallel IO (PARLIO) Controller 3.4.13 General DMA Controller (GDMA) 3.4.14 Event Task Matrix (ETM) 3.5 Radio 3.5.1 2.4 GHz Receiver 3.5.2 2.4 GHz Transmitter 3.5.3 Clock Generator 3.6 Wi-Fi 3.6.1 Wi-Fi Radio and Baseband 3.6.2 Wi-Fi MAC 3.6.3 Networking Features 3.7 Bluetooth LE 3.7.1 Bluetooth LE PHY 3.7.2 Bluetooth LE Link Controller 3.8 802.15.4 3.8.1 802.15.4 PHY 3.8.2 802.15.4 MAC 3.9 Low Power Management 3.10 Timers 3.10.1 System Timer 3.10.2 General Purpose Timers 3.10.3 Watchdog Timers 3.11 Cryptography/Security Components 3.11.1 AES Accelerator (AES) 3.11.2 ECC Accelerator (ECC) 3.11.3 HMAC Accelerator (HMAC) 3.11.4 RSA Accelerator (RSA) 3.11.5 SHA Accelerator (SHA) 3.11.6 Digital Signature (DS) 3.11.7 External Memory Encryption and Decryption (XTS_AES) 3.11.8 Random Number Generator (RNG) 3.12 Peripheral Pin Configurations 4 Electrical Characteristics 4.1 Absolute Maximum Ratings 4.2 Recommended Power Supply Characteristics 4.3 VDD_SPI Output Characteristics 4.4 DC Characteristics (3.3 V, 25 °C) 4.5 ADC Characteristics 4.6 Current Consumption 4.6.1 RF Current Consumption in Active Mode 4.6.2 Current Consumption in Other Modes 4.7 Reliability 5 RF Characteristics 5.1 Wi-Fi Radio 5.1.1 Wi-Fi RF Transmitter (TX) Characteristics 5.1.2 Wi-Fi RF Receiver (RX) Characteristics 5.2 Bluetooth LE Radio 5.2.1 Bluetooth LE RF Transmitter (TX) Characteristics 5.2.2 Bluetooth LE RF Receiver (RX) Characteristics 5.3 802.15.4 Radio 5.3.1 802.15.4 RF Transmitter (TX) Characteristics 5.3.2 802.15.4 RF Receiver (RX) Characteristics 6 Packaging 7 Related Documentation and Resources Appendix A – ESP32-C6 Consolidated Pin Overview Revision History