Datasheet TSB711, TSB711A TSB712, TSB712A (STMicroelectronics) - 7
| Hersteller | STMicroelectronics |
| Beschreibung | Precision Rail-To-Rail Input/Output 36 V, 6 MHz Op Amps |
| Seiten / Seite | 32 / 7 — TSB711, TSB711A, TSB712, TSB712A. Electrical characteristics. Symbol. … |
| Dateiformat / Größe | PDF / 4.3 Mb |
| Dokumentensprache | Englisch |
TSB711, TSB711A, TSB712, TSB712A. Electrical characteristics. Symbol. Parameter. Conditions. Min. Typ. Max. Unit. AC performance. DS12487
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TSB711, TSB711A, TSB712, TSB712A Electrical characteristics Symbol Parameter Conditions Min. Typ. Max. Unit
VOUT = VCC, T = 25 °C 20 50 ISINK VOUT = VCC, -40 °C < T < 125 °C 15 IOUT mA VOUT = 0 V, T = 25 °C 20 50 ISOURCE VOUT = 0 V, -40 °C < T < 125 °C 15 No load, T = 25 °C 1.4 ICC Supply current by op-amp mA No load, -40 °C < T < 125 °C 2.3
AC performance
GBP Gain bandwidth product RL = 10 kΩ, CL = 100 pF 4.5 6 MHz 3 V step, RL = 10 kΩ, CL = 100 pF, SR Slew rate 2 2.7 V/µs AV = 1 V/V, 10% to 90% VIN = 1 Vrms , RL = 10 kΩ, AV = +1, f = 1 kHz, 0.00032 Total harmonic distorsion + BW = 22 kHz THD+N % noise VIN = 1 Vrms , RL = 1 kΩ, AV = +1, f = 1 kHz, 0.0004 BW = 22 kHz Φm Phase margin At unity gain, 25 °C, 10 kΩ, 100 pF 34 ᵒ CLOAD Capacitive load drive 100 (4) pF f = 10 Hz 20 en Input voltage noise density f = 100 Hz 13 nV/√Hz f = 10 kHz 12 en p-p Input noise voltage 0.1 Hz ≤ f ≤ 10 Hz 0.8 µVPP in Input current noise density f = 1 kHz 0.15 (5) pA/√Hz 1. See Section 5.4 Input offset voltage drift over the temperature in application information. 2. Current is positive when it is sinked into the op-amp. 3. Iio is defined as |Iibp – Iibn|. 4. For higher capacitive values see Figure 24. Phase margin vs. output current at VCC = 5 V, Figure 26. Phase margin vs. capacitive load 5. Theoretical value of the input current noise density based on the measurement of the input transistor base current: i n = 2. q.ib
DS12487
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Rev 7 page 7/32
Document Outline TSB711, TSB711A, TSB712, TSB712A 1 Pin description 2 Absolute maximum ratings and operating conditions 3 Electrical characteristics 4 Typical performance characteristics 5 Application information 5.1 Operating voltages 5.2 Input pin voltage range 5.3 Rail-to-rail input stage 5.4 Input offset voltage drift over the temperature 5.5 Long term input offset voltage drift 5.6 EMI rejection 5.7 Maximum power dissipation 5.8 Capacitive load and stability 5.9 PCB layout recommendations 5.10 Decoupling capacitor 6 Typical applications 6.1 Low-side current sensing 7 Package information 7.1 SOT23-5 package information 7.2 MiniSO8 package information 7.3 SO8 package information 8 Ordering information Revision history
TSB711, TSB711A, TSB712, TSB712A Electrical characteristics Symbol Parameter Conditions Min. Typ. Max. Unit
VOUT = VCC, T = 25 °C 20 50 ISINK VOUT = VCC, -40 °C < T < 125 °C 15 IOUT mA VOUT = 0 V, T = 25 °C 20 50 ISOURCE VOUT = 0 V, -40 °C < T < 125 °C 15 No load, T = 25 °C 1.4 ICC Supply current by op-amp mA No load, -40 °C < T < 125 °C 2.3
AC performance
GBP Gain bandwidth product RL = 10 kΩ, CL = 100 pF 4.5 6 MHz 3 V step, RL = 10 kΩ, CL = 100 pF, SR Slew rate 2 2.7 V/µs AV = 1 V/V, 10% to 90% VIN = 1 Vrms , RL = 10 kΩ, AV = +1, f = 1 kHz, 0.00032 Total harmonic distorsion + BW = 22 kHz THD+N % noise VIN = 1 Vrms , RL = 1 kΩ, AV = +1, f = 1 kHz, 0.0004 BW = 22 kHz Φm Phase margin At unity gain, 25 °C, 10 kΩ, 100 pF 34 ᵒ CLOAD Capacitive load drive 100 (4) pF f = 10 Hz 20 en Input voltage noise density f = 100 Hz 13 nV/√Hz f = 10 kHz 12 en p-p Input noise voltage 0.1 Hz ≤ f ≤ 10 Hz 0.8 µVPP in Input current noise density f = 1 kHz 0.15 (5) pA/√Hz 1. See Section 5.4 Input offset voltage drift over the temperature in application information. 2. Current is positive when it is sinked into the op-amp. 3. Iio is defined as |Iibp – Iibn|. 4. For higher capacitive values see Figure 24. Phase margin vs. output current at VCC = 5 V, Figure 26. Phase margin vs. capacitive load 5. Theoretical value of the input current noise density based on the measurement of the input transistor base current: i n = 2. q.ib
DS12487
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Rev 7 page 7/32
Document Outline TSB711, TSB711A, TSB712, TSB712A 1 Pin description 2 Absolute maximum ratings and operating conditions 3 Electrical characteristics 4 Typical performance characteristics 5 Application information 5.1 Operating voltages 5.2 Input pin voltage range 5.3 Rail-to-rail input stage 5.4 Input offset voltage drift over the temperature 5.5 Long term input offset voltage drift 5.6 EMI rejection 5.7 Maximum power dissipation 5.8 Capacitive load and stability 5.9 PCB layout recommendations 5.10 Decoupling capacitor 6 Typical applications 6.1 Low-side current sensing 7 Package information 7.1 SOT23-5 package information 7.2 MiniSO8 package information 7.3 SO8 package information 8 Ordering information Revision history