Datasheet INN5375F, INN5376F, INN5377F, INN5396F, INN5475F, INN5476F, INN5477F, INN5496F (Power Integrations) - 9
| Hersteller | Power Integrations |
| Beschreibung | Digitally Controllable Off-Line CV/CC ZVS Flyback Switcher IC with 750 V and 900 V PowiGaN Switch, Synchronous Rectification and FluxLink Feedback |
| Seiten / Seite | 58 / 9 — InnoSwitch5-Pro. Register Definition. Write and Read Command I2C … |
| Dateiformat / Größe | PDF / 3.5 Mb |
| Dokumentensprache | Englisch |
InnoSwitch5-Pro. Register Definition. Write and Read Command I2C Protocol. I2C Slave Address
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InnoSwitch5-Pro Register Definition Write and Read Command I2C Protocol
[A] denotes a Slave Acknowledgement
I2C Slave Address
[a] denotes a Master Acknowledgement The InnoSwitch5-Pro 7-bit slave address is 0x18 (7’b001 1000). [na] denotes a Master nack [W] denotes Write (1’b0) LSB [r] denotes Read (1’b1) [PI_SLAVE_ADDRESS] = 0x18 (7’b001 1000) 0 0 1 1 0 0 0 [PI_COMMAND] (see PI COMMAND Register Address Assignments, Description and Control Range Section) [TELEMETRY_REGISTER_ADDRESS] (see Telemetry (Read-Back) 6 5 4 3 2 1 0 Registers Address Assignment and Description Section) PI-8444-100417 Every I2C transaction should have a minimum of 150 msec delay between commands. If this delay is not provided commands may be ignored. The InnoSwitch5-Pro does not support clock stretching. Figure 9. PI Slave Address.
I2C Protocol Format is 3-Byte Write Command
Write commands: [PI_SLAVE_ADDRESS][W][A][PI_COMMAND][A][Byte][A] or [PI_SLAVE_ADDRESS][W][A][PI_COMMAND][A][Low Byte][A][High Byte][A] PI_COMMAND BYTE WRITE LOW BYTE DATA WRITE HIGH BYTE DATA START PI_SLAVE_ADDRESS 0x10 0x20 0x86 STOP SDA 0 0 1 1 0 0 0 w A 0 0 0 1 0 0 0 0 A 0 0 1 0 0 0 0 0 A 1 0 0 0 0 1 1 0 A SCL A ACK GENERATED BY PI_SLAVE COMMAND EXECUTED PI-8445-100417 Figure 10. Example Register Write Command Sequence (CV set to 8 V).
I2C Protocol Format is 2-Byte Read Command
Word Read transaction: [PI_SLAVE_ADDRESS][W][A][PI_COMMAND][A][START_TELEMETRY_REGISTER_ADDRESS] [A][END_TELEMETRY_REGISTER_ADDRESS [A] [PI_SLAVE_ADDRESS] [r][A]{PI Slave responds Low Byte}[a]{PI Slave responds High Byte}[na] READ REGISTER START TELEMETRY REGISTER END TELEMETRY REGISTER START PI_SLAVE_ADDRESS 0x80 0x16 0x16 STOP SDA 0 0 1 1 0 0 0 W A 1 0 0 0 0 0 0 0 A 0 0 0 1 0 1 1 0 A 0 0 0 1 0 1 1 0 A SCL LOW BYTE READ-BACK HIGH BYTE READ-BACK START PI_SLAVE_ADDRESS 0x00 0x02 STOP SDA 0 0 1 1 0 0 0 r A 0 0 0 0 0 0 0 0 a 0 0 0 0 0 0 1 0 na SCL A ACK GENERATED BY PI_SLAVE a MASTER ack na MASTER nack PI-8446a-060520 Figure 11. Example Read Register Sequence (Read Fault Register READ11). Note: START and END TELEMETRY Register Addresses Does Not Have to Point to Same Register to Read multiple Registers in Single Command.
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Rev. C 01/24 www.power.com
[A] denotes a Slave Acknowledgement
I2C Slave Address
[a] denotes a Master Acknowledgement The InnoSwitch5-Pro 7-bit slave address is 0x18 (7’b001 1000). [na] denotes a Master nack [W] denotes Write (1’b0) LSB [r] denotes Read (1’b1) [PI_SLAVE_ADDRESS] = 0x18 (7’b001 1000) 0 0 1 1 0 0 0 [PI_COMMAND] (see PI COMMAND Register Address Assignments, Description and Control Range Section) [TELEMETRY_REGISTER_ADDRESS] (see Telemetry (Read-Back) 6 5 4 3 2 1 0 Registers Address Assignment and Description Section) PI-8444-100417 Every I2C transaction should have a minimum of 150 msec delay between commands. If this delay is not provided commands may be ignored. The InnoSwitch5-Pro does not support clock stretching. Figure 9. PI Slave Address.
I2C Protocol Format is 3-Byte Write Command
Write commands: [PI_SLAVE_ADDRESS][W][A][PI_COMMAND][A][Byte][A] or [PI_SLAVE_ADDRESS][W][A][PI_COMMAND][A][Low Byte][A][High Byte][A] PI_COMMAND BYTE WRITE LOW BYTE DATA WRITE HIGH BYTE DATA START PI_SLAVE_ADDRESS 0x10 0x20 0x86 STOP SDA 0 0 1 1 0 0 0 w A 0 0 0 1 0 0 0 0 A 0 0 1 0 0 0 0 0 A 1 0 0 0 0 1 1 0 A SCL A ACK GENERATED BY PI_SLAVE COMMAND EXECUTED PI-8445-100417 Figure 10. Example Register Write Command Sequence (CV set to 8 V).
I2C Protocol Format is 2-Byte Read Command
Word Read transaction: [PI_SLAVE_ADDRESS][W][A][PI_COMMAND][A][START_TELEMETRY_REGISTER_ADDRESS] [A][END_TELEMETRY_REGISTER_ADDRESS [A] [PI_SLAVE_ADDRESS] [r][A]{PI Slave responds Low Byte}[a]{PI Slave responds High Byte}[na] READ REGISTER START TELEMETRY REGISTER END TELEMETRY REGISTER START PI_SLAVE_ADDRESS 0x80 0x16 0x16 STOP SDA 0 0 1 1 0 0 0 W A 1 0 0 0 0 0 0 0 A 0 0 0 1 0 1 1 0 A 0 0 0 1 0 1 1 0 A SCL LOW BYTE READ-BACK HIGH BYTE READ-BACK START PI_SLAVE_ADDRESS 0x00 0x02 STOP SDA 0 0 1 1 0 0 0 r A 0 0 0 0 0 0 0 0 a 0 0 0 0 0 0 1 0 na SCL A ACK GENERATED BY PI_SLAVE a MASTER ack na MASTER nack PI-8446a-060520 Figure 11. Example Read Register Sequence (Read Fault Register READ11). Note: START and END TELEMETRY Register Addresses Does Not Have to Point to Same Register to Read multiple Registers in Single Command.
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Rev. C 01/24 www.power.com