Datasheet MC10EP16, MC100EP16 (ON Semiconductor)
| Hersteller | ON Semiconductor |
| Beschreibung | 3.3 V/5 V ECL Differential Receiver/Driver |
| Seiten / Seite | 13 / 1 — Description. www.onsemi.com. SOIC−8 NB. TSSOP−8. DFN8. D SUFFIX. DT … |
| Dateiformat / Größe | PDF / 357 Kb |
| Dokumentensprache | Englisch |
Description. www.onsemi.com. SOIC−8 NB. TSSOP−8. DFN8. D SUFFIX. DT SUFFIX. MN SUFFIX. CASE 751−07 CASE 948R−02 CASE 506AA
Modelllinie für dieses Datenblatt
Textversion des Dokuments
link to page 8 3.3 V/5 V ECL Differential Receiver/Driver MC10EP16, MC100EP16
Description
The EP16 is a world−class differential receiver/driver. The device is functionally equivalent to the EL16 and LVEL16 devices with higher
www.onsemi.com
performance capabilities. With output transition times significantly faster than the EL16 and LVEL16, the EP16 is ideally suited for interfacing with high frequency sources. The V 8 8 BB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused 1 1 differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB
SOIC−8 NB TSSOP−8 DFN8
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
D SUFFIX DT SUFFIX MN SUFFIX
to 0.5 mA. When not used, VBB should be left open.
CASE 751−07 CASE 948R−02 CASE 506AA
Under open input conditions (pulled to VEE) internal input clamps will force the Q output LOW. The 100 Series contains temperature compensation.
MARKING DIAGRAMS* Features
• 220 ps Typical Propagation Delay 8 8 • Maximum Frequency = > 4 GHz Typical HEP16 HP16 • ALYW PECL Mode Operating Range: ALYWG G G VCC = 3.0 V to 5.5 V with VEE = 0 V 1 1 • NECL Mode Operating Range: V 8 8 CC = 0 V with VEE = −3.0 V to −5.5 V • G Open Input Default State KEP16 KP16 G • ALYW Safety Clamp on Inputs ALYWG 3B M G • G Q Output Will Default LOW with Inputs Open or at V 1 4 EE 1 1 • VBB Output
SOIC−8 NB TSSOP−8 DFN8
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant H = MC10 K = MC100 3B = MC100 M = Date Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb-Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. © Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
May, 2021 − Rev. 8 MC10EP16/D
Description
The EP16 is a world−class differential receiver/driver. The device is functionally equivalent to the EL16 and LVEL16 devices with higher
www.onsemi.com
performance capabilities. With output transition times significantly faster than the EL16 and LVEL16, the EP16 is ideally suited for interfacing with high frequency sources. The V 8 8 BB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused 1 1 differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB
SOIC−8 NB TSSOP−8 DFN8
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
D SUFFIX DT SUFFIX MN SUFFIX
to 0.5 mA. When not used, VBB should be left open.
CASE 751−07 CASE 948R−02 CASE 506AA
Under open input conditions (pulled to VEE) internal input clamps will force the Q output LOW. The 100 Series contains temperature compensation.
MARKING DIAGRAMS* Features
• 220 ps Typical Propagation Delay 8 8 • Maximum Frequency = > 4 GHz Typical HEP16 HP16 • ALYW PECL Mode Operating Range: ALYWG G G VCC = 3.0 V to 5.5 V with VEE = 0 V 1 1 • NECL Mode Operating Range: V 8 8 CC = 0 V with VEE = −3.0 V to −5.5 V • G Open Input Default State KEP16 KP16 G • ALYW Safety Clamp on Inputs ALYWG 3B M G • G Q Output Will Default LOW with Inputs Open or at V 1 4 EE 1 1 • VBB Output
SOIC−8 NB TSSOP−8 DFN8
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant H = MC10 K = MC100 3B = MC100 M = Date Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb-Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. © Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
May, 2021 − Rev. 8 MC10EP16/D