Datasheet AP7179D (Diodes) - 5

AP7179D Feature Descriptions Operation
The AP7179D operates with single supply input range from 1.1V to 6.5V and is capable of delivering 3A current to output. The device has a high PSRR, and its low noise provides a clean supply to the application. A low-noise reference and error amplifier are included to reduce device noise. The CNR/SS capacitor filters the noise from the reference and the CFF feed-forward capacitor filters the noise from the error amplifier. The power-supply rejection ratio (PSRR) of the AP7179D minimizes the coupling of input supply noise to the output. The combination of a low noise-floor and high PSRR ensure that the device provides a clean supply to the application.
Enable and Shutdown
The AP7179D provides an EN pin, as an external chip enable control, to enable or disable the device. A VEN below 0.5V turns the regulator off and enters shutdown mode. When the VEN is above 1.1V, it turns the regulator on. When the regulator is shut down, the ground current is reduced to a maximum of 25μA. The enable circuitry has hysteresis (typically 50mV) with relatively slow, ramping analog signals. When the enable function is not desired, the EN must be tied as close as possible to the VIN \ to prevent voltage drops on the VIN line from triggering the enable circuit.
VOUT Programming Pins
The AP7179D’s built-in matched feedback resistor network sets the output voltage. The output voltage can be programmed from 0.8V to 3.95V, with 50mV steps by tying programming pins 5 to 11 to the ground. Tying any of the VOUT programming pins to SNS can lower the value of the upper resistor divider and increase programming resolution.
Power Good
The power-good circuit monitors the feedback pin voltage to indicate the status of the output voltage. The open-drain PGOOD pin requires an external pull-up resistor to an external supply, any downstream device can receive power-good as a logic signal for sequencing. A pull-up resistor from 10kΩ to 100kΩ is recommended. Make sure that the external pull-up supply voltage results in a valid logic signal for the receiving device. After start-up, the PGOOD pin has a high impedance when the feedback voltage exceeds VPGOOD_HYS (typically 88.3% of 0.8V reference voltage level). The PGOOD is pulled to GND when the feedback pin voltage falls below the VIT_PGOOD.
Programmable Soft-Start
Soft-start refers to the ramp-up time of the output voltage during LDO turn-on after EN and VUVLO exceed the respective threshold voltage. The AP7179D activates a quick-start circuit to charge the noise reduction capacitor (CNR/SS) and then the output voltage ramps up. The noise reduction capacitor (CNR/SS) accomplishes both noise-reduction and the soft-start ramp-time programming during turn-on.
Undervoltage Lockout (UVLO)
The UVLO circuit monitors the input voltage to prevent the device from turning on before the VIN rises above the VUVLO threshold. The UVLO circuit also disables the output of the device when VIN falls below the lockout voltage (VUVLO – VHYS). The UVLO circuit responds quickly to glitches on the VIN and will attempt to disable the output of the device if the VIN collapses.
Internal Current Limit (ILIM)
The AP7179D continuously monitors the output current to protect the pass transistor against high-load current faults or shorting events. When encountering an abnormal condition, the LDO sources constant current to limit the output within the predefined range. Thermal shutdown can activate during a current-limit event because of the high power dissipation typically found in these conditions. To ensure proper operation of the current limit, minimize the inductances to the input and load. Continuous operation in current limit is not recommended. By reason of the built-in body diode, the pass transistor conducts current when the output voltage exceeds input voltage. Since the current is not limited here, external current protection should be added if the device may work in a reverse voltage state.
Overtemperature Protection (OTP)
The AP7179D implements thermal shutdown protection. The device is disabled when the junction temperature (TJ) exceeds 160°C (typical). Thermal shutdown hysteresis ensures that the LDO resets again (turns on) when the temperature falls to 140°C (typical). Continuously running the AP7179D into thermal shutdown or above a junction temperature of 125°C reduces long-term reliability.
Output Active Discharge
When the device is disabled, the AP7179D discharges the LDO output (via VOUT pins) through an internal pulldown MOSFET that connects a resistance of several hundred ohms to ground. Do not rely on the active discharge circuit for discharging a large amount of output capacitance after the input supply has collapsed because reverse current can possibly flow from the output to the input. External current protection should be added if the device may work at a reverse voltage state. AP7179D 5 of 20 January 2023 Document number: DS42129 Rev. 2 - 2
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