Datasheet EFM8SB2 (Silicon Labs) - 10

EFM8SB2 Data Sheet System Overview
10-Bit Analog-to-Digital Converter (ADC0)
The ADC is a successive-approximation-register (SAR) ADC with 10- and 8-bit modes, integrated track-and hold and a programmable window detector. The ADC is fully configurable under software control via several registers. The ADC may be configured to measure different signals using the analog multiplexer. The voltage reference for the ADC is selectable between internal and external reference sources. • Up to 22 external inputs. • Single-ended 10-bit mode. • Supports an output update rate of 300 ksps samples per second. • Operation in low power modes at lower conversion speeds. • Asynchronous hardware conversion trigger, selectable between software, external I/O and internal timer sources. • Output data window comparator allows automatic range checking. • Support for burst mode, which produces one set of accumulated data per conversion-start trigger with programmable power-on set- tling and tracking time. • Conversion complete and window compare interrupts supported. • Flexible output data formatting. • Includes an internal 1.65 V fast-settling reference and support for external reference. • Integrated temperature sensor.
Low Current Comparators (CMP0, CMP1)
Analog comparators are used to compare the voltage of two analog inputs, with a digital output indicating which input voltage is higher. External input connections to device I/O pins and internal connections are available through separate multiplexers on the positive and negative inputs. Hysteresis, response time, and current consumption may be programmed to suit the specific needs of the application. The comparator module includes the following features: • Up to 12 external positive inputs. • Up to 11 external negative inputs. • Additional input options: • Capacitive Sense Comparator output. • VDD. • VDD divided by 2. • Internal connection to LDO output. • Direct connection to GND. • Synchronous and asynchronous outputs can be routed to pins via crossbar. • Programmable hysteresis between 0 and +/-20 mV. • Programmable response time. • Interrupts generated on rising, falling, or both edges.
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| Smart. Connected. Energy-friendly. Rev. 1.2 | 9 Document Outline 1. Feature List 2. Ordering Information 3. System Overview 3.1 Introduction 3.2 Power 3.3 I/O 3.4 Clocking 3.5 Counters/Timers and PWM 3.6 Communications and Other Digital Peripherals 3.7 Analog 3.8 Reset Sources 3.9 Debugging 3.10 Bootloader 4. Electrical Specifications 4.1 Electrical Characteristics 4.1.1 Recommended Operating Conditions 4.1.2 Power Consumption 4.1.3 Reset and Supply Monitor 4.1.4 Flash Memory 4.1.5 Power Management Timing 4.1.6 Internal Oscillators 4.1.7 Crystal Oscillator 4.1.8 External Clock Input 4.1.9 ADC 4.1.10 Voltage References 4.1.11 Temperature Sensor 4.1.12 Comparators 4.1.13 Programmable Current Reference (IREF0) 4.1.14 Port I/O 4.2 Thermal Conditions 4.3 Absolute Maximum Ratings 4.4 Typical Performance Curves 5. Typical Connection Diagrams 5.1 Power 5.2 Debug 5.3 Other Connections 6. Pin Definitions 6.1 EFM8SB2x-QFN32 Pin Definitions 6.2 EFM8SB2x-QFN24 Pin Definitions 6.3 EFM8SB2x-QFP32 Pin Definitions 7. QFN32 Package Specifications 7.1 QFN32 Package Dimensions 7.2 QFN32 PCB Land Pattern 7.3 QFN32 Package Marking 8. QFN24 Package Specifications 8.1 QFN24 Package Dimensions 8.2 QFN24 PCB Land Pattern 8.3 QFN24 Package Marking 9. QFP32 Package Specifications 9.1 QFP32 Package Dimensions 9.2 QFP32 PCB Land Pattern 9.3 QFP32 Package Marking 10. Revision History 10.1 Revision 1.2 10.2 Revision 1.1 Table of Contents