Datasheet ADG736 (Analog Devices) - 3
| Hersteller | Analog Devices |
| Beschreibung | CMOS Low Voltage 2.5 Ω Dual SPDT Switch |
| Seiten / Seite | 12 / 3 — Data Sheet. ADG736. SPECIFICATIONS. Table 1. B Version. −40°C to. … |
| Dateiformat / Größe | PDF / 249 Kb |
| Dokumentensprache | Englisch |
Data Sheet. ADG736. SPECIFICATIONS. Table 1. B Version. −40°C to. Parameter. 25°C. +85°C. +125°C. Unit. Test Conditions/Comments
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Data Sheet ADG736 SPECIFICATIONS
VDD = 5 V ± 10%, GND = 0 V. All specifications −40°C to +125°C, unless otherwise noted.
Table 1. B Version −40°C to −40°C to Parameter 25°C +85°C +125°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range 0 V to VDD V On Resistance (RON) 2.5 Ω typ VS = 0 V to VDD, IDS = −10 mA; see Figure 10 4 4.5 7 Ω max On Resistance Match Between Channels (∆RON) 0.1 Ω typ VS = 0 V to VDD, IDS = −10 mA 0.4 0.4 Ω max On Resistance Flatness (RFLAT (ON)) 0.5 Ω typ VS = 0 V to VDD, IDS = −10 mA 1.2 1.5 Ω max LEAKAGE CURRENTS VDD = 5.5 V Source Off Leakage IS (Off) ±0.01 1 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 11 Channel On Leakage ID, IS (On) ±0.01 5 nA typ VS = VD = 1 V or 4.5 V; see Figure 12 DIGITAL INPUTS Input High Voltage, VINH 2.4 2.4 V min Input Low Voltage, VINL 0.8 0.8 V max Input Current, IINL or IINH 0.005 µA typ VIN = VINL or VINH ± 0.1 ± 0.1 µA max DYNAMIC CHARACTERISTICS1 tON 12 ns typ RL = 300 Ω, CL = 35 pF 16 16 ns max VS = 3 V; see Figure 13 tOFF 5 ns typ RL = 300 Ω, CL = 35 pF 8 8 ns max VS = 3 V; see Figure 13 Break-Before-Make Time Delay, tD 7 ns typ RL = 300 Ω, CL = 35 pF 1 1 ns min VS1 = VS2 = 3 V; see Figure 14 Off Isolation –62 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz –82 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 15 Channel-to-Channel Crosstalk –62 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz –82 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 16 Bandwidth (–3 dB) 200 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 17 CS (Off) 9 pF typ CD, CS (On) 32 pF typ POWER REQUIREMENTS VDD = 5.5 V IDD 0.001 µA typ Digital inputs = 0 V or 5 V 1.0 1.0 µA max 1 Guaranteed by design; not subject to production test. Rev. D | Page 3 of 12 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Applications Information Outline Dimensions Ordering Guide Automotive Products
Data Sheet ADG736 SPECIFICATIONS
VDD = 5 V ± 10%, GND = 0 V. All specifications −40°C to +125°C, unless otherwise noted.
Table 1. B Version −40°C to −40°C to Parameter 25°C +85°C +125°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range 0 V to VDD V On Resistance (RON) 2.5 Ω typ VS = 0 V to VDD, IDS = −10 mA; see Figure 10 4 4.5 7 Ω max On Resistance Match Between Channels (∆RON) 0.1 Ω typ VS = 0 V to VDD, IDS = −10 mA 0.4 0.4 Ω max On Resistance Flatness (RFLAT (ON)) 0.5 Ω typ VS = 0 V to VDD, IDS = −10 mA 1.2 1.5 Ω max LEAKAGE CURRENTS VDD = 5.5 V Source Off Leakage IS (Off) ±0.01 1 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 11 Channel On Leakage ID, IS (On) ±0.01 5 nA typ VS = VD = 1 V or 4.5 V; see Figure 12 DIGITAL INPUTS Input High Voltage, VINH 2.4 2.4 V min Input Low Voltage, VINL 0.8 0.8 V max Input Current, IINL or IINH 0.005 µA typ VIN = VINL or VINH ± 0.1 ± 0.1 µA max DYNAMIC CHARACTERISTICS1 tON 12 ns typ RL = 300 Ω, CL = 35 pF 16 16 ns max VS = 3 V; see Figure 13 tOFF 5 ns typ RL = 300 Ω, CL = 35 pF 8 8 ns max VS = 3 V; see Figure 13 Break-Before-Make Time Delay, tD 7 ns typ RL = 300 Ω, CL = 35 pF 1 1 ns min VS1 = VS2 = 3 V; see Figure 14 Off Isolation –62 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz –82 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 15 Channel-to-Channel Crosstalk –62 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz –82 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 16 Bandwidth (–3 dB) 200 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 17 CS (Off) 9 pF typ CD, CS (On) 32 pF typ POWER REQUIREMENTS VDD = 5.5 V IDD 0.001 µA typ Digital inputs = 0 V or 5 V 1.0 1.0 µA max 1 Guaranteed by design; not subject to production test. Rev. D | Page 3 of 12 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Applications Information Outline Dimensions Ordering Guide Automotive Products