Datasheet AT89C51 (Microchip) - 6

Programming the Flash
and data for the entire array or until the end of the object file is reached. The AT89C51 is normally shipped with the on-chip Flash
Data Polling:
The AT89C51 features Data Polling to indi- memory array in the erased state (that is, contents = FFH) cate the end of a write cycle. During a write cycle, an and ready to be programmed. The programming interface attempted read of the last byte written will result in the com- accepts either a high-voltage (12-volt) or a low-voltage plement of the written datum on PO.7. Once the write cycle (V ) program enable signal. The low-voltage program- CC has been completed, true data are valid on all outputs, and ming mode provides a convenient way to program the the next cycle may begin. Data Polling may begin any time AT89C51 inside the user’s system, while the high-voltage after a write cycle has been initiated. programming mode is compatible with conventional third- party Flash or EPROM programmers.
Ready/Busy:
The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled The AT89C51 is shipped with either the high-voltage or low after ALE goes high during programming to indicate low-voltage programming mode enabled. The respective BUSY. P3.4 is pulled high again when programming is top-side marking and device signature codes are listed in done to indicate READY. the following table.
Program Verify:
If lock bits LB1 and LB2 have not been
V = 12V V = 5V PP PP
programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits Top-side Mark AT89C51 AT89C51 cannot be verified directly. Verification of the lock bits is xxxx xxxx-5 achieved by observing that their features are enabled. yyww yyww
Chip Erase:
The entire Flash array is erased electrically Signature (030H) = 1EH (030H) = 1EH by using the proper combination of control signals and by (031H) = 51H (031H) = 51H holding ALE/PROG low for 10 ms. The code array is written (032H) =F FH (032H) = 05H with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed. The AT89C51 code memory array is programmed byte-by-
Reading the Signature Bytes:
The signature bytes are byte in either programming mode. To program any non- read by the same procedure as a normal verification of blank byte in the on-chip Flash Memory, the entire memory locations 030H, 031H, and 032H, except that P3.6 and must be erased using the Chip Erase Mode. P3.7 must be pulled to a logic low. The values returned are
Programming Algorithm:
Before programming the as follows. AT89C51, the address, data and control signals should be (030H) = 1EH indicates manufactured by Atmel set up according to the Flash programming mode table and (031H) = 51H indicates 89C51 Figure 3 and Figure 4. To program the AT89C51, take the (032H) = FFH indicates 12V programming following steps. (032H) = 05H indicates 5V programming 1. Input the desired memory location on the address lines.
Programming Interface
2. Input the appropriate data byte on the data lines. 3. Activate the correct combination of control signals. Every code byte in the Flash array can be written and the entire array can be erased by using the appropriate combi- 4. Raise EA/V to 12V for the high-voltage program- PP nation of control signals. The write operation cycle is self- ming mode. timed and once initiated, will automatically time itself to 5. Pulse ALE/PROG once to program a byte in the completion. Flash array or the lock bits. The byte-write cycle is All major programming vendors offer worldwide support for self-timed and typically takes no more than 1.5 ms. the Atmel microcontroller series. Please contact your local Repeat steps 1 through 5, changing the address programming vendor for the appropriate software revision.
6 AT89C51
Document Outline Block Diagram Features Description Pin Description VCC GND Port 0 Port 1 Port 2 Port 3 RST ALE/PROG PSEN EA/VPP XTAL1 XTAL2 Oscillator Characteristics Status of External Pins During Idle and Power-down Modes Lock Bit Protection Modes Programming the Flash Programming Interface Flash Programming Modes Flash Programming and Verification Waveforms - High-voltage Mode (VPP = 12V) Flash Programming and Verification Waveforms - Low-voltage Mode (VPP = 5V) Flash Programming and Verification Characteristics Absolute Maximum Ratings* DC Characteristics AC Characteristics External Program and Data Memory Characteristics External Program Memory Read Cycle External Data Memory Read Cycle External Data Memory Write Cycle External Clock Drive Waveforms External Clock Drive Serial Port Timing: Shift Register Mode Test Conditions Shift Register Mode Timing Waveforms AC Testing Input/Output Waveforms(1) Float Waveforms(1) Ordering Information