Datasheet ADP3623, ADP3624, ADP3625, ADP3633, ADP3634, ADP3635 (Analog Devices) - 7
| Hersteller | Analog Devices |
| Beschreibung | High Speed, Dual, 4 A MOSFET Driver with Thermal Protection |
| Seiten / Seite | 16 / 7 — ADP3623/ADP3624/ADP3625/ADP3633/ADP3634/ADP3635. PIN CONFIGURATION AND … |
| Dateiformat / Größe | PDF / 317 Kb |
| Dokumentensprache | Englisch |
ADP3623/ADP3624/ADP3625/ADP3633/ADP3634/ADP3635. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. OTW. ADP3623/. INA 2. OUTA. ADP3633
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ADP3623/ADP3624/ADP3625/ADP3633/ADP3634/ADP3635 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SD 1 8 OTW ADP3623/ INA 2 7 OUTA ADP3633 PGND 3 6 TOP VIEW VDD INB (Not to Scale) 4 5 OUTB NOTES 1. THE EXPOSED PAD OF THE PACKAGE IS NOT DIRECTLY CONNECTED TO ANY PIN OF THE PACKAGE, BUT IT IS ELECTRICALLY AND THERMALLY CONNECTED TO THE DIE
008
SUBSTRATE, WHICH IS THE GROUND OF THE DEVICE.
08132- Figure 7. ADP3623/ADP3633 Pin Configuration
Table 3. ADP3623/ADP3633 Pin Function Descriptions Pin No. Mnemonic Description
1 SD Output Shutdown. When high, this pin disables normal operation, forcing OUTA and OUTB low. 2 INA Inverting Input Pin for Channel A Gate Driver. 3 PGND Ground. This pin should be closely connected to the source of the power MOSFET. 4 INB Inverting Input Pin for Channel B Gate Driver. 5 OUTB Output Pin for Channel B Gate Driver. 6 VDD Power Supply Voltage. Bypass this pin to PGND with a ~1 µF to 5 µF ceramic capacitor. 7 OUTA Output Pin for Channel A Gate Driver. 8 OTW Overtemperature Warning Flag. Open drain, active low.
SD 1 8 OTW ADP3624/ INA 2 7 OUTA ADP3634 PGND 3 6 TOP VIEW VDD INB (Not to Scale) 4 5 OUTB NOTES 1. THE EXPOSED PAD OF THE PACKAGE IS NOT DIRECTLY CONNECTED TO ANY PIN OF THE PACKAGE, BUT IT IS ELECTRICALLY AND THERMALLY CONNECTED TO THE DIE
001
SUBSTRATE, WHICH IS THE GROUND OF THE DEVICE.
08132- Figure 8. ADP3624/ADP3634 Pin Configuration
Table 4. ADP3624/ADP3634 Pin Function Descriptions Pin No. Mnemonic Description
1 SD Output Shutdown. When high, this pin disables normal operation, forcing OUTA and OUTB low. 2 INA Input Pin for Channel A Gate Driver. 3 PGND Ground. This pin should be closely connected to the source of the power MOSFET. 4 INB Input Pin for Channel B Gate Driver. 5 OUTB Output Pin for Channel B Gate Driver. 6 VDD Power Supply Voltage. Bypass this pin to PGND with a ~1 µF to 5 µF ceramic capacitor. 7 OUTA Output Pin for Channel A Gate Driver. 8 OTW Overtemperature Warning Flag. Open drain, active low. Rev. A | Page 7 of 16 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuit Theory of Operation Input Drive Requirements (INA, AA, INB, AA, and SD) Low-Side Drivers (OUTA, OUTB) Shutdown (SD) Function Overtemperature Protections Supply Capacitor Selection PCB Layout Considerations Parallel Operation Thermal Considerations Design Example Outline Dimensions Ordering Guide
008
SUBSTRATE, WHICH IS THE GROUND OF THE DEVICE.
08132- Figure 7. ADP3623/ADP3633 Pin Configuration
Table 3. ADP3623/ADP3633 Pin Function Descriptions Pin No. Mnemonic Description
1 SD Output Shutdown. When high, this pin disables normal operation, forcing OUTA and OUTB low. 2 INA Inverting Input Pin for Channel A Gate Driver. 3 PGND Ground. This pin should be closely connected to the source of the power MOSFET. 4 INB Inverting Input Pin for Channel B Gate Driver. 5 OUTB Output Pin for Channel B Gate Driver. 6 VDD Power Supply Voltage. Bypass this pin to PGND with a ~1 µF to 5 µF ceramic capacitor. 7 OUTA Output Pin for Channel A Gate Driver. 8 OTW Overtemperature Warning Flag. Open drain, active low.
SD 1 8 OTW ADP3624/ INA 2 7 OUTA ADP3634 PGND 3 6 TOP VIEW VDD INB (Not to Scale) 4 5 OUTB NOTES 1. THE EXPOSED PAD OF THE PACKAGE IS NOT DIRECTLY CONNECTED TO ANY PIN OF THE PACKAGE, BUT IT IS ELECTRICALLY AND THERMALLY CONNECTED TO THE DIE
001
SUBSTRATE, WHICH IS THE GROUND OF THE DEVICE.
08132- Figure 8. ADP3624/ADP3634 Pin Configuration
Table 4. ADP3624/ADP3634 Pin Function Descriptions Pin No. Mnemonic Description
1 SD Output Shutdown. When high, this pin disables normal operation, forcing OUTA and OUTB low. 2 INA Input Pin for Channel A Gate Driver. 3 PGND Ground. This pin should be closely connected to the source of the power MOSFET. 4 INB Input Pin for Channel B Gate Driver. 5 OUTB Output Pin for Channel B Gate Driver. 6 VDD Power Supply Voltage. Bypass this pin to PGND with a ~1 µF to 5 µF ceramic capacitor. 7 OUTA Output Pin for Channel A Gate Driver. 8 OTW Overtemperature Warning Flag. Open drain, active low. Rev. A | Page 7 of 16 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuit Theory of Operation Input Drive Requirements (INA, AA, INB, AA, and SD) Low-Side Drivers (OUTA, OUTB) Shutdown (SD) Function Overtemperature Protections Supply Capacitor Selection PCB Layout Considerations Parallel Operation Thermal Considerations Design Example Outline Dimensions Ordering Guide