Datasheet EFM8SB1 (Silicon Labs) - 2

EFM8SB1 Data Sheet Feature List
1. Feature List
The EFM8SB1 highlighted features are listed below. • Core: • Timers/Counters and PWM: • Pipelined CIP-51 Core • 32-bit Real Time Clock (RTC) • Fully compatible with standard 8051 instruction set • 3-channel Programmable Counter Array (PCA) supporting • 70% of instructions execute in 1-2 clock cycles PWM, capture/compare, and frequency output modes with • 25 MHz maximum operating frequency watchdog timer function • Memory: • 4 x 16-bit general-purpose timers • Up to 8 kB flash memory, in-system re-programmable • Communications and Digital Peripherals: from firmware. • UART • Up to 512 bytes RAM (including 256 bytes standard 8051 • SPI™ Master / Slave RAM and 256 bytes on-chip XRAM) • SMBus™ / I2C™ Master / Slave • Power: • 16-bit CRC unit, supporting automatic CRC of flash at 256- • Internal LDO regulator for CPU core voltage byte boundaries • Power-on reset circuit and brownout detectors • Analog: • I/O: Up to 17 total multifunction I/O pins: • Capacitive Sense (CS0) • Flexible peripheral crossbar for peripheral routing • Programmable current reference (IREF0) • 5 mA source, 12.5 mA sink allows direct drive of LEDs • 12-Bit Analog-to-Digital Converter (ADC0) • Clock Sources: • 1 x Low-current analog comparator • Internal 20 MHz low power oscillator with ±10% accuracy • On-Chip, Non-Intrusive Debugging • Internal 24.5 MHz precision oscillator with ±2% accuracy • Full memory and register inspection • Internal 16.4 kHz low-frequency oscillator or RTC 32 kHz • Four hardware breakpoints, single-stepping crystal (RTC crystal not available on CSP16 packages) • Pre-loaded UART bootloader • External crystal, RC, C, and CMOS clock options • Temperature range -40 to 85 ºC • Single power supply 1.8 to 3.6 V • QSOP24, QFN24, QFN20, and CSP16 packages With on-chip power-on reset, voltage supply monitor, watchdog timer, and clock oscillator, the EFM8SB1 devices are truly standalone system-on-a-chip solutions. The flash memory is reprogrammable in-circuit, providing non-volatile data storage and allowing field up- grades of the firmware. The on-chip debugging interface (C2) allows non-intrusive (uses no on-chip resources), full speed, in-circuit debugging using the production MCU installed in the final application. This debug logic supports inspection and modification of memory and registers, setting breakpoints, single stepping, and run and halt commands. All analog and digital peripherals are fully functional while debugging. Each device is specified for 1.8 to 3.6 V operation. Devices are AEC-Q100 qualified (Grade 3) and are available in 16- pin CSP, 20-pin QFN, 24-pin QFN, or 24-pin QSOP packages. All package options are lead-free and RoHS compliant.
Note:
CSP devices can be handled and soldered using industry standard surface mount assembly techniques. However, because CSP devices are essentially a piece of silicon and are not encapsulated in plastic, they are susceptible to mechanical damage and may be sensitive to light. When CSP packages must be used in an environment exposed to light, it may be necessary to cover the top and sides with an opaque material.
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| Building a more connected world. Rev. 1.4 | 1 Document Outline 1. Feature List 2. Ordering Information 3. System Overview 3.1 Introduction 3.2 Power 3.3 I/O 3.4 Clocking 3.5 Counters/Timers and PWM 3.6 Communications and Other Digital Peripherals 3.7 Analog 3.8 Reset Sources 3.9 Debugging 3.10 Bootloader 4. Electrical Specifications 4.1 Electrical Characteristics 4.1.1 Recommended Operating Conditions 4.1.2 Power Consumption 4.1.3 Reset and Supply Monitor 4.1.4 Flash Memory 4.1.5 Power Management Timing 4.1.6 Internal Oscillators 4.1.7 Crystal Oscillator 4.1.8 External Clock Input 4.1.9 ADC 4.1.10 Voltage Reference 4.1.11 Temperature Sensor 4.1.12 Comparators 4.1.13 Programmable Current Reference (IREF0) 4.1.14 Capacitive Sense (CS0) 4.1.15 Port I/O 4.1.16 SMBus 4.2 Thermal Conditions 4.3 Absolute Maximum Ratings 4.4 Typical Performance Curves 5. Typical Connection Diagrams 5.1 Power 5.2 Debug 5.3 Other Connections 6. Pin Definitions 6.1 EFM8SB1x-QFN20 Pin Definitions 6.2 EFM8SB1x-QFN24 Pin Definitions 6.3 EFM8SB1x-QSOP24 Pin Definitions 6.4 EFM8SB1x-CSP16 Pin Definitions 7. CSP16 Package Specifications 7.1 CSP16 Package Dimensions 7.2 CSP16 PCB Land Pattern 7.3 CSP16 Package Marking 8. QFN20G Package Specifications 8.1 QFN20 Package Dimensions 8.2 QFN20 PCB Land Pattern 8.3 QFN20 Package Marking 9. QFN20A Package Specifications 9.1 QFN20 Package Dimensions 9.2 QFN20 PCB Land Pattern 9.3 QFN20 Package Marking 10. QFN24 Package Specifications 10.1 QFN24 Package Dimensions 10.2 QFN24 PCB Land Pattern 10.3 QFN24 Package Marking 11. QSOP24 Package Specifications 11.1 QSOP24 Package Dimensions 11.2 QSOP24 PCB Land Pattern 11.3 QSOP24 Package Marking 12. Revision History 12.1 Revision 1.4 12.2 Revision 1.3 12.3 Revision 1.2 12.4 Revision 1.1 Table of Contents