Datasheet CA3280, CA3280A (Intersil) - 5

CA3280, CA3280A
Application Information
Figures 4 and 5 show the equivalent circuits for the current source (lABC). With no diode bias current, the gain is merely gMRL. For and linearization diodes in the CA3280. The current through the example, with an lABC of 1mA, the gM is approximately 16mS. linearization network is approximately equal to the programming With the CA3280 operating into a 5k resistor, the gain is 80. current. There are several advantages to driving these diodes The need for external buffers can be eliminated by the use of with a current source. First, only the offset current from the biasing low value load resistors, but the resulting increase in the network flows through the input resistor. Second, another input is required amplifier bias current reduces the input impedance of provided to extend the gain control dynamic range. And third, the the CA3280. The linearization diode impedance also input is truly differential and can accept signals within the common decreases as the diode bias current increases, which further mode range of the CA3280. loads the input. The diodes, in addition to acting as a
Typical Applications
linearization network, also operate as an additional attenuation system to accommodate input signals in the volt range when The structure of the variable operational amplifier eliminates the they are applied through appropriate input resistors. need for matched resistor networks in differential to single ended converters, as shown in Figure 6. A matched resistor network Figure 10 shows a triangle wave to sine wave converter using requires ratio matching of 0.01% or trimming for 80dB of the CA3280. Two 100k resistors are connected between the common-mode rejection. The CA3280, with its excellent differential amplifier emitters and V+ to reduce the current flow common mode rejection ratio, is capable of converting a small through the differential amplifier. This allows the amplifier to (25mV) differential input signal to a single-ended output without fully cut off during peak input signal excursions. THD is the need for a matched resistor network. appropriately 0.37% for this circuit. Figure 7 shows the CA3280 in a typical gain control application. Gain control can be performed with the amplifier bias current
V+ RD = SMALL SIGNAL DIODE IMPEDANCE 70 RD
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52 ID(mA) x 1.34 = ID RD VOA VOA I I ABC D IABC ID V- FIGURE 4. VOA SHOWING LINEARIZATION DIODES AND FIGURE 5. BLOCK DIAGRAM OF LINEARIZED VOA CURRENT DRIVE 10V +15V P-P V+ = +15V INPUT 68k OUTPUT 21VP-P 600 68k 14mV AGC 1 FEEDTHRU 10k 14 14 400

V 16 NOISE AT 2k 3 + MAX GAIN 16 V+ 1/2 + 13 CA3280 1/2 SINGLE- 330k DIFFERENTIAL 13 CA3280 ENDED - 100k 15 INPUT OUTPUT 2k 4 - 15 15k 4 3 V- 10k 10k 1 20k V- = -15V -15V VOLTAGE CONTROL FIGURE 6. DIFFERENTIAL TO SINGLE ENDED CONVERTER FIGURE 7. TYPICAL GAIN CONTROL CIRCUIT
FN1174 Rev 6.00 Page 5 of 10 May 2002