Datasheet ADG852 (Analog Devices) - 3

HerstellerAnalog Devices
Beschreibung0.8 Ω CMOS, 1.8 V to 5.5 V, SPDT/2:1 Mux Mini LFCSP
Seiten / Seite16 / 3 — Data Sheet. ADG852. SPECIFICATIONS. Table 1. Parameter. +25°C −40°C to …
RevisionB
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DokumentenspracheEnglisch

Data Sheet. ADG852. SPECIFICATIONS. Table 1. Parameter. +25°C −40°C to +85°C Unit. Test Conditions/Comments

Data Sheet ADG852 SPECIFICATIONS Table 1 Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments

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Data Sheet ADG852 SPECIFICATIONS
VDD = 4.2 V to 5.5 V, GND = 0 V, unless otherwise noted.
Table 1. Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range 0 V to VDD V On Resistance, RON 0.8 Ω typ VDD = 4.2 V, VS = 0 V to VDD, IDS = 100 mA; see Figure 16 0.85 1 Ω max On Resistance Match Between Channels, ∆RON 0.02 Ω typ VDD = 4.2 V, VS = 0 V to VDD, IDS = 100 mA 0.04 Ω max On Resistance Flatness, RFLAT (ON) 0.17 Ω typ VDD = 4.2 V, VS = 0 V to VDD, IDS = 100 mA 0.23 Ω max LEAKAGE CURRENTS VDD = 5.5 V Source Off Leakage, IS (Off) ±10 pA typ VS = 0.6 V/4.2 V, VD = 4.2 V/0.6 V; see Figure 17 Channel On Leakage, ID, IS (On) ±30 pA typ VS = VD = 0.6 V or 4.2 V; see Figure 18 DIGITAL INPUTS Input High Voltage, VINH 2.0 V min Input Low Voltage, VINL 0.8 V max Input Current IINL or IINH 0.002 µA typ VIN = VGND or VDD 0.05 µA max CIN, Digital Input Capacitance 2.5 pF typ DYNAMIC CHARACTERISTICS1 tON 17 ns typ RL = 50 Ω, CL = 35 pF 23 28 ns max VS = 3 V/0 V; see Figure 19 tOFF 6 ns typ RL = 50 Ω, CL = 35 pF 8.5 9.2 ns max VS = 3 V; see Figure 19 Break-Before-Make Time Delay, tBBM 14 ns typ RL = 50 Ω, CL = 35 pF 8 ns min VS1 = VS2 = 1.5 V; see Figure 20 Charge Injection 30 pC typ VS = 1.5 V, RS = 0 Ω, CL = 1 nF; see Figure 21 Off Isolation −75 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 22 Channel-to-Channel Crosstalk −73 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 24 Total Harmonic Distortion, THD + N 0.08 % RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 3.5 V p-p Insertion Loss −0.6 dB typ RL = 50 Ω, CL = 5 pF; see Figure 23 −3 dB Bandwidth 100 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 23 CS (Off) 19.5 pF typ CD, CS (On) 50 pF typ POWER REQUIREMENTS VDD = 5.5 V IDD 0.002 µA typ Digital inputs = 0 V or 5.5 V 1.0 µA max 1 Guaranteed by design, not subject to production test. Rev. B | Page 3 of 16 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Description Typical Performance Characteristics Test Circuits Terminology Outline Dimensions Ordering Guide