Datasheet ADG733, ADG734 (Analog Devices) - 9

HerstellerAnalog Devices
BeschreibungCMOS, 2.5 Ω Low Voltage, Triple/Quad SPDT Switches
Seiten / Seite12 / 9 — ADG733/ADG734. Test Circuits. IDS. ID (ON). S (OFF). RON = V1/IDS. VDD. …
RevisionB
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DokumentenspracheEnglisch

ADG733/ADG734. Test Circuits. IDS. ID (ON). S (OFF). RON = V1/IDS. VDD. 0.1. ADDRESS. S1B. DRIVE. 50%. VS1B. VOUT. S1A. VS1A. 90%. 300. 35pF. IN/EN. GND. OFF. VSS

ADG733/ADG734 Test Circuits IDS ID (ON) S (OFF) RON = V1/IDS VDD 0.1 ADDRESS S1B DRIVE 50% VS1B VOUT S1A VS1A 90% 300 35pF IN/EN GND OFF VSS

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ADG733/ADG734 Test Circuits IDS V1 I ID (ON) S (OFF) S D S D S D A NC A V V S V V S D D RON = V1/IDS
Test Circuit 1. On Resistance Test Circuit 2. I Test Circuit 3. I S (OFF) D (ON)
VDD 0.1 F VDD ADDRESS S1B DRIVE 50% 50% VS1B D1 VOUT S1A VS1A R VS1A L CL 90% 90% 300 35pF VOUT IN/EN VS1B GND V t t SS ON OFF 0.1 F VSS
Test Circuit 4. Switching Times, tON, tOFF
V V DD SS 0.1 F 3V VDD VSS ENABLE 50% 50% A2 DRIVE (VIN) S1A VS A1 S1B 0V A0 tOFF(EN) ADG733 VO 0.9V 0.9V 0 0 EN D1 VO CL V 50 RL OUTPUT IN GND 300 35pF 0V tON(EN)
Test Circuit 5. Enable Delay, tON (EN), tOFF (EN)
VDD 0.1 F 3V VDD ADDRESS SA VS ADDRESS* V 0V IN 50 SB ADG733/ ADG734 VS D1 VOUT RL CL VOUT 80% 80% GND VSS 300 35pF 0.1 F tOPEN VSS *A0, A1, A2 FOR ADG733, IN1-4 FOR ADG734
Test Circuit 6. Break-Before-Make Delay, tOPEN REV. B –9– Document Outline Features Applications General Description Functional Block Diagrams Product Highlights Specifications Absolute Maximum Ratings Pin Configurations Terminology Typical Performance Characteristics Test Circuits Outline Dimensions Ordering Guide Revision History