Data SheetADG1433/ADG1434IN1120IN41AN14ASIENN4ISS1A219S4A2019181716D1318D4S1B417S4BD1 115 D4V5ADG143416S1B 214 S4BSSVDDADG1434TOP VIEWVSS 313 VDDGND615NIC(Not to Scale)TOP VIEWGND 412 S3B(Not to Scale)S2B714S3BS2B 511 D3D2813D36789S2A10912S3AD22AN2IN33AIIN2 1011IN3SS 004 NOTES 006 1. THE EXPOSED PAD IS TIED TO THENIC = NO INTERNAL CONNECTION.SUBSTRATE, V 06181- SS. 06181- Figure 6. ADG1434 TSSOP Pin Configuration Figure 7. ADG1434 LFCSP Pin Configuration Table 8. ADG1434 Pin Function DescriptionsPin No.TSSOP LFCSPMnemonic Description 1 19 IN1 Logic Control Input 1. 2 20 S1A Source Terminal 1A. Can be an input or an output. 3 1 D1 Drain Terminal 1. Can be an input or an output. 4 2 S1B Source Terminal 1B. Can be an input or an output. 5 3 VSS Most Negative Power Supply Potential. In single-supply applications, it can be connected to ground. 6 4 GND Ground (0 V) Reference. 7 5 S2B Source Terminal 2B. Can be an input or an output. 8 6 D2 Drain Terminal 2. Can be an input or an output. 9 7 S2A Source Terminal 2A. Can be an input or an output. 10 8 IN2 Logic Control Input 2. 11 9 IN3 Logic Control Input 3. 12 10 S3A Source Terminal 3A. Can be an input or an output. 13 11 D3 Drain Terminal 3. Can be an input or an output. 14 12 S3B Source Terminal 3B. Can be an input or an output. 15 N/A1 NIC No Internal Connection. 16 13 VDD Most Positive Power Supply Potential. 17 14 S4B Source Terminal 4B. Can be an input or an output. 18 15 D4 Drain Terminal 4. Can be an input or an output. 19 16 S4A Source Terminal 4A. Can be an input or an output. 20 17 IN4 Logic Control Input 4. N/A1 18 EN Active Low Digital Input. When high, the device is disabled and all switches are off. When low, INx logic inputs determine the on switches. N/A1 0 EPAD Exposed Pad. The exposed pad is tied to the substrate, VSS. 1 N/A means not applicable. Table 9. ADG1434 TSSOP Truth Table INxSxASxB 0 Off On 1 On Off Table 10. ADG1434 LFCSP Truth Table ENINxSxASxB 1 X Off Off 0 0 Off On 0 1 On Off Rev. E | Page 9 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY 12 V SINGLE SUPPLY ±5 V DUAL SUPPLY ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY OUTLINE DIMENSIONS ORDERING GUIDE