Datasheet ADG1221, ADG1222, ADG1223 (Analog Devices) - 8

HerstellerAnalog Devices
BeschreibungLow Capacitance, Low Charge Injection, ±15 V/+12 V iCMOS Dual SPST Switches
Seiten / Seite16 / 8 — ADG1221/ADG1222/ADG1223. Data Sheet. TERMINOLOGY IDD. tON. ISS. tOFF. VD …
RevisionB
Dateiformat / GrößePDF / 451 Kb
DokumentenspracheEnglisch

ADG1221/ADG1222/ADG1223. Data Sheet. TERMINOLOGY IDD. tON. ISS. tOFF. VD (VS). tBBM. RON. FLAT(ON). QINJ (Charge Injection). IS (Off)

ADG1221/ADG1222/ADG1223 Data Sheet TERMINOLOGY IDD tON ISS tOFF VD (VS) tBBM RON FLAT(ON) QINJ (Charge Injection) IS (Off)

Modelllinie für dieses Datenblatt

Textversion des Dokuments

link to page 13 link to page 13
ADG1221/ADG1222/ADG1223 Data Sheet TERMINOLOGY IDD tON
The positive supply current. The delay between applying the digital control input and the output switching on (see Figure 26).
ISS
The negative supply current.
tOFF
The delay between applying the digital control input and the
VD (VS)
output switching off (see Figure 26). The analog voltage on Terminal D and Terminal S.
tBBM RON
Off time or on time measured between the 90% points of both The ohmic resistance between Terminal D and Terminal S. switches, when switching from one address state to another
R
(ADG1223 only).
FLAT(ON)
Flatness is defined as the difference between the maximum and
QINJ (Charge Injection)
minimum value of on resistance, as measured over the specified A measure of the glitch impulse transferred from the digital analog signal range. input to the analog output during switching.
IS (Off) Off Isolation
The source leakage current with the switch off. A measure of unwanted signal coupling through an off switch.
ID (Off) Crosstalk
The drain leakage current with the switch off. A measure of unwanted signal that is coupled through from one
I
channel to another as a result of parasitic capacitance.
D, IS (On)
The channel leakage current with the switch on.
–3 dB Bandwidth V
The frequency at which the output is attenuated by 3 dB.
INL
The maximum input voltage for Logic 0.
On Response V
The frequency response of the on switch.
INH
The minimum input voltage for Logic 1.
Insertion Loss I
The loss due to the on resistance of the switch.
INL (IINH)
The input current of the digital input.
THD + N (Total Harmonic Noise Plus Distortion) C
The ratio of the harmonic amplitude plus noise of the signal to
S (Off)
The off switch source capacitance, measured with reference the fundamental. to ground.
ACPSRR (AC Power Supply Rejection Ratio)
Measures the ability of a part to avoid coupling noise and spurious
CD (Off)
signals that appear on the supply voltage pin to the output of the The off switch drain capacitance, measured with reference switch. The dc voltage on the device is modulated by a sine wave to ground. of 0.62 V p-p. The ratio of the amplitude of signal on the output
C
to the amplitude of the modulation is the ACPSRR.
D, CS (On)
The on switch capacitance, measured with reference to ground.
CIN
The digital input capacitance. Rev. B | Page 8 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE