Datasheet ADG1219 (Analog Devices)

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Low Capacitance, Low Charge Injection, ±15 V/12 V
i
CMOS SPDT in SOT-23 ADG1219 FEATURES FUNCTIONAL BLOCK DIAGRAM <0.5 pC charge injection over full signal range ADG1219 2.5 pF off capacitance SA Low leakage; 0.6 nA maximum @ 85°C SB D 120 Ω on resistance DECODER Fully specified at +12 V, ±15 V No VL supply required 3 V logic-compatible inputs IN EN
01 0
Rail-to-rail operation
5- 57
SWITCHES SHOWN FOR A LOGIC 0 INPUT
06
8-lead SOT-23 package
Figure 1.
APPLICATIONS Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio/video signal routing Communication systems GENERAL DESCRIPTION
The ADG1219 is a monolithic iCMOS® device containing an charge injection over the entire signal range of the device. SPDT switch. An EN input is used to enable or disable the iCMOS construction also ensures ultralow power dissipation, device. When disabled, all channels are switched off. When on, making the parts ideally suited for portable and battery- each channel conducts equally well in both directions and has powered instruments. an input signal range that extends to the supplies. Each switch
0.5
exhibits break-before-make switching action.
TA = 25ºC 0.4
The iCMOS (industrial CMOS) modular manufacturing
V 0.3 DD = +15V
process combines high voltage complementary metal-oxide
VSS = –15V C) p 0.2 (
semiconductor (CMOS) and bipolar technologies. It enables the
N IO
development of a wide range of high performance analog ICs
0.1 CT
capable of 33 V operation in a footprint that no other generation
JE 0 N I E
of high voltage parts has been able to achieve. Unlike analog ICs
V –0.1 DD = +12V V RG SS = 0V
using conventional CMOS processes, iCMOS components can
–0.2 CHA
tolerate high supply voltages while providing increased perfor-
–0.3
mance, dramatically lower power consumption, and reduced
VDD = +5V
33
–0.4
0
VSS = –5V
5- package size. 57
–0.5
06 The ultralow capacitance and exceptionally low charge injection
–15 –10 –5 0 5 10 15 INPUT VOLTAGE (V)
of these multiplexers make them ideal solutions for data acquisi- tion and sample-and-hold applications, where low glitch and Figure 2. Charge Injection vs. Input Voltage fast settling are required. Figure 2 shows that there is minimum
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY OUTLINE DIMENSIONS ORDERING GUIDE