link to page 14 link to page 14 link to page 14 link to page 14 link to page 15 link to page 15 link to page 15 link to page 15 link to page 15 link to page 14 link to page 14 link to page 14 link to page 13 link to page 13 link to page 16 Data SheetADG529812 V SINGLE SUPPLY VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, and −55°C ≤ TA ≤ +210°C, unless otherwise noted. Table 3. ParameterSymbol1Test Conditions/Comments1Min Typ2Max Unit ANALOG SWITCH Analog Signal Range VSS VDD V On Resistance RON VS = 0 V to 10 V, IDS = −1 mA, see Figure 31; 650 800 Ω for maximum RON, VDD = 10.8 V, VSS = 0 V On-Resistance Match Between Channels ΔRON VS = 0 V to 10 V, IDS = −1 mA 3 24 Ω On-Resistance Flatness RFLAT (ON) VS = 0 V to 10 V, IDS = −1 mA 240 380 Ω LEAKAGE CURRENTS VDD = 13.2 V, VSS = 0 V Source Off Leakage IS (off) VS = 1 V/10 V, VD = 10 V/1 V, see Figure 32 −8 ±0.005 +8 nA Drain Off Leakage ID (off) VS = 1 V/10 V, VD = 10 V/1 V, see Figure 32 −60 ±0.005 +60 nA Channel On Leakage ID (on), IS (on) VS = VD = 1 V/10 V, see Figure 30 −70 ±0.01 +70 nA DIGITAL INPUTS Input High Voltage VINH 2.0 V Input Low Voltage VINL 0.8 V Input Current IINL or IINH VIN = VGND or VDD −0.1 +0.002 +0.1 µA Digital Input Capacitance CIN 3 pF DYNAMIC CHARACTERISTICS3 Transition Time tTRANSITION RL = 300 Ω, CL = 35 pF, VS = 8 V, see Figure 36 200 490 ns On Time tON (EN) RL = 300 Ω, CL = 35 pF, VS = 8 V, see Figure 38 180 435 ns Off Time tOFF (EN) RL = 300 Ω, CL = 35 pF, VS = 8 V, see Figure 38 165 305 ns Break-Before-Make Time Delay tD RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 8 V, 40 95 ns see Figure 37 Charge Injection QINJ VS = 6 V, RS = 0 Ω, CL = 1 nF, see Figure 39 0.2 pC Off Isolation RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 34 −86 dB Channel to Channel Crosstalk RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 33 −80 dB −3 dB Bandwidth RL = 50 Ω, CL = 5 pF, see Figure 35 95 MHz Source Capacitance, Off CS (off) VS = 6 V, f = 1 MHz 3.3 pF Drain Capacitance, Off CD (off) VS = 6 V, f = 1 MHz 38 pF Source/Drain Capacitance, On CD (on), CS (on) VS = 6 V, f = 1 MHz 41 pF POWER REQUIREMENTS VDD = 13.2 V Supply Current Positive IDD Digital inputs = 0 V or 5 V, see Figure 28 50 75 µA Negative ISS Digital inputs = 0 V or 5 V, see Figure 29 7.5 15 µA Ground Current IGND Digital inputs = 0 V or 5 V 50 75 µA Supply Range VDD/VSS GND = 0 V, VSS = 0 V 9 40 V 1 See the Terminology section. 2 TA = 25°C, except for the analog switch and power requirements values, where TA = 210°C. 3 Guaranteed by design, not subject to production test. Rev. 0 | Page 5 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±15 V DUAL-SUPPLY ±20 V DUAL SUPPLY 12 V SINGLE SUPPLY 36 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL (Sx OR D) ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION TRENCH ISOLATION APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE