link to page 19 link to page 19 link to page 19 link to page 19 link to page 20 link to page 20 link to page 20 link to page 20 Data SheetADGS5414SPECIFICATIONS ±15 V DUAL SUPPLY Digital logic voltage (VDD) = +15 V ± 10%, negative supply voltage (VSS) = −15 V ± 10%, positive supply voltage (VL) = 2.7 V to 5.5 V, GND = 0 V, unless otherwise noted. Table 1.Parameter+25°C−40°C to +85°C−40°C to +125°CUnitTest Conditions/Comments ANALOG SWITCH Analog Signal Range VDD to VSS V On Resistance, RON 13.5 Ω typ Source voltage (VS) = ±10 V, IS = −10 mA; see Figure 29 15 18 22 Ω max VDD = +13.5 V, VSS = −13.5 V On-Resistance Match Between Channels, 0.3 Ω typ VS = ±10 V, source current ∆RON (IS) = −10 mA 0.8 1.3 1.4 Ω max On-Resistance Flatness, RFLAT (ON) 1.8 Ω typ VS = ±10 V, IS = −10 mA 2.2 2.6 3 Ω max LEAKAGE CURRENTS VDD = +16.5 V, VSS = −16.5 V Source Off Leakage, IS (Off ) ±0.1 nA typ VS = ±10 V, VD = ±10 V; see Figure 32 ±0.25 ±1 ±7 nA max Drain Off Leakage, ID (Off ) ±0.1 nA typ VS = ±10 V, VD = ±10 V; see Figure 32 ±0.25 ±1 ±7 nA max Channel On Leakage, ID (On), IS (On) ±0.15 nA typ VS = VD = ±10 V; see Figure 28 ±0.4 ±2 ±14 nA max DIGITAL OUTPUT Output Voltage Low, VOL 0.4 V max Sink current (ISINK) = 5 mA 0.2 V max ISINK = 1 mA Output Current, Low (IOL) or High (IOH) 0.001 μA typ Output voltage (VOUT) = ground voltage (VGND)or VL ±0.1 μA max Digital Output Capacitance, COUT 4 pF typ DIGITAL INPUTS Input Voltage High, VINH 2 V min 3.3 V < VL ≤ 5.5 V 1.35 V min 2.7 V ≤ VL ≤ 3.3 V Low, VINL 0.8 V max 3.3 V < VL ≤ 5.5 V 0.8 V max 2.7 V ≤ VL ≤ 3.3 V Input Current, Low (IINL) or High (IINH) 0.001 μA typ VIN = VGND or VL ±0.1 μA max Digital Input Capacitance, CIN 4 pF typ DYNAMIC CHARACTERISTICS tON 410 ns typ Load resistance (RL) = 300 Ω, load capacitance (CL) = 35 pF 420 515 515 ns max VS = 10 V; see Figure 37 tOFF 135 ns typ RL = 300 Ω, CL = 35 pF 140 185 195 ns max VS = 10 V; see Figure 37 Break-Before-Make Time Delay, tD 260 ns typ RL = 300 Ω, CL = 35 pF 250 210 ns min VS1 = VS2 = 10 V; see Figure 36 Charge Injection, QINJ 125 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 38 Rev. 0 | Page 3 of 30 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY ±20 V DUAL SUPPLY 12 V SINGLE SUPPLY 36 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR Dx Pins TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION ADDRESS MODE ERROR DETECTION FEATURES CRC Error Detection SCLK Count Error Detection Invalid Read/Write Address Error CLEARING THE ERROR FLAGS REGISTER BURST MODE SOFTWARE RESET DAISY-CHAIN MODE POWER-ON RESET BREAK-BEFORE-MAKE SWITCHING TRENCH ISOLATION APPLICATIONS INFORMATION POWER SUPPLY RAILS POWER SUPPLY RECOMMENDATIONS REGISTER SUMMARY REGISTER DETAILS SWITCH DATA REGISTER ERROR CONFIGURATION REGISTER ERROR FLAGS REGISTER BURST ENABLE REGISTER SOFTWARE RESET REGISTER OUTLINE DIMENSIONS ORDERING GUIDE