Datasheet AEM00300 (E-peas) - 6

DATASHEET AEM00300
G[4] G[2] G[1] G[0] O VL_CF ST _ O_CF O_CF O_CF C_L T T T CS_IN GND ST S S S SR 28 27 26 25 24 23 22 GND 1 21 SRC_LVL_CFG[5] SRC 2 20 SRC_LVL_CFG[3] GND 3 19 EN_HP BUFSRC 4 18 STO_CFG[3] QFN28 LIN 5 Top view 17 STO_OVCH LOUT 6 16 STO_RDY GND 7 15 STO_OVDIS 8 9 10 11 12 13 14 L O BA ST G[0] G[1] VINT G[2] O_CH T VL_CF VL_CF VL_CF EN_S C_L C_L C_L SR SR SR Figure 2: Pinout Diagram QFN 28-pin NAME PIN NUMBER FUNCTION Power pins SRC 2 Connection to the harvested energy source. BUFSRC 4 Connection to an external capacitor buffering the DCDC converter input. LIN 5 DCDC inductance connection. LOUT 6 DCDC inductance connection. VINT 10 Internal voltage supply. BAL 13 Connection to mid-point of a dual-cel supercapacitor (optional). Must be connected to GND if not used. Connection to the energy storage element - battery or (super-)capacitor. STO 14 Cannot be left floating. Must be connected to a minimum capacitance of 100 μF or to a rechargeable battery. CS_IN 28 Input for the external cold start circuit. Status pins ST_STO 26 Logic output. Asserted when the storage device voltage VSTO rises above the VCHRDY threshold, reset when VSTO drops below the VOVDIS threshold. High level is VSTO. Table 1: Power and Status Pins DS D _A _ E A M0 M 030 3 0_Rev e 1.0. 0 0 Copyr y ight h © 2022 2 e-pe p as a SA S Confidential 7 Document Outline Table of Contents List of Tables 1. Introduction 2. Absolute Maximum Ratings 3. Thermal Resistance 4. Typical Electrical Characteristics at 25 °C 5. Recommended Operation Conditions 6. Functional Block Diagram 7. Theory of Operation 7.1. DCDC Converter 7.2. Reset and Wake Up States 7.3. Supply State 7.4. Source Voltage Regulation 7.5. Balancing for Dual-Cell Supercapacitor 8. System Configuration 8.1. High Power / Low Power Mode 8.2. Storage Element Configuration 8.3. Custom Mode Configuration 8.4. Disable Storage Element Charging 8.5. Source Level Configuration 8.6. External Components 8.6.1. Storage element information 8.6.2. External inductor information 8.6.3. External capacitors information CSRC CINT 9. Typical Application Circuits 9.1. Example Circuit 1 9.2. Example Circuit 2 9.3. Circuit Behaviour 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.5. DCDC Conversion Efficiency From SRC to STO in High Power Mode 10. Schematic 11. Layout 12. Package Information 12.1. Plastic Quad Flatpack No-Lead (QFN 28-pin 4x4mm) 12.2. Board Layout 13. Revision History