Datasheet NXS0506 (Nexperia) - 4
| Hersteller | Nexperia |
| Beschreibung | SD 3.0-compatible memory card integrated auto-direction control and level translator with EMI filter and ESD protection |
| Seiten / Seite | 17 / 4 — Nexperia. NXS0506. SD 3.0-compatible memory card integrated … |
| Revision | 31012022 |
| Dateiformat / Größe | PDF / 269 Kb |
| Dokumentensprache | Englisch |
Nexperia. NXS0506. SD 3.0-compatible memory card integrated auto-direction control and level translator with EMI filter and
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Nexperia NXS0506 SD 3.0-compatible memory card integrated auto-direction control and level translator with EMI filter and ESD protection 8. Pinning information 8.1. Pinning NXS0506
bump A1
NXS0506
index area 1 2 3 4 1 2 3 4 A DAT2A VCCA VCCB DAT2B A B DAT3A CMDA CMDB DAT3B B C DAT0A CLKFB GND DAT0B C D DAT1A CLKA CLKB DAT1B D aaa-034250 aaa-034249 Transparent top view Transparent top view Bump CLKFB (C2) can be left floating.
Fig. 3. Bump configuration SOT8025-1 (WLCSP16) Fig. 4. Bump mapping SOT8025-1 (WLCSP16) 8.2. Pin description Table 3. Pin description Symbol[1] Bump Description
DAT2A A1 data 2 input or output on host side DAT3A B1 data 3 input or output on host side DAT0A C1 data 0 input or output on host side DAT1A D1 data 1 input or output on host side VCCA A2 supply voltage A (host side) CMDA B2 command input or output on host side CLKFB C2 clock feedback signal on host side, this pin can be left floating CLKA D2 clock signal input on host side VCCB A3 supply voltage B (memory card side) CMDB B3 command input or output on memory card side GND C3 supply ground CLKB D3 clock signal input on memory card side DAT2B A4 data 2 input or output on memory card side DAT3B B4 data 3 input or output on memory card side DAT0B C4 data 0 input or output on memory card side DAT1B D4 data 1 input or output on memory card side [1] The pin names relate particularly to SD memory cards, but also apply to microSD and MMC memory cards. See Section 9.6 for options to swap identical channels. NXS0506 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2022. Al rights reserved
Product data sheet Rev. 1 — 31 January 2022 4 / 17
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Ordering information 5. Marking 6. Block diagram 7. Functional diagram 8. Pinning information 8.1. Pinning 8.2. Pin description 9. Functional description 9.1. Level translator 9.2. Enable and direction control 9.3. Feedback clock channel 9.4. EMI filter 9.5. ESD protection 9.6. Pin and channel naming 10. Limiting values 11. Recommended operating conditions 12. Static characteristics 13. Dynamic characteristics 13.1. Level translator 14. Application information 14.1. PCB design guidelines 15. Design and assembly recommendations 15.1. PCB design guidelines 15.2. PCB assembly guidelines for Pb-free soldering 16. Package outline 17. Abbreviations 18. Revision history 19. Legal information Contents
Nexperia NXS0506 SD 3.0-compatible memory card integrated auto-direction control and level translator with EMI filter and ESD protection 8. Pinning information 8.1. Pinning NXS0506
bump A1
NXS0506
index area 1 2 3 4 1 2 3 4 A DAT2A VCCA VCCB DAT2B A B DAT3A CMDA CMDB DAT3B B C DAT0A CLKFB GND DAT0B C D DAT1A CLKA CLKB DAT1B D aaa-034250 aaa-034249 Transparent top view Transparent top view Bump CLKFB (C2) can be left floating.
Fig. 3. Bump configuration SOT8025-1 (WLCSP16) Fig. 4. Bump mapping SOT8025-1 (WLCSP16) 8.2. Pin description Table 3. Pin description Symbol[1] Bump Description
DAT2A A1 data 2 input or output on host side DAT3A B1 data 3 input or output on host side DAT0A C1 data 0 input or output on host side DAT1A D1 data 1 input or output on host side VCCA A2 supply voltage A (host side) CMDA B2 command input or output on host side CLKFB C2 clock feedback signal on host side, this pin can be left floating CLKA D2 clock signal input on host side VCCB A3 supply voltage B (memory card side) CMDB B3 command input or output on memory card side GND C3 supply ground CLKB D3 clock signal input on memory card side DAT2B A4 data 2 input or output on memory card side DAT3B B4 data 3 input or output on memory card side DAT0B C4 data 0 input or output on memory card side DAT1B D4 data 1 input or output on memory card side [1] The pin names relate particularly to SD memory cards, but also apply to microSD and MMC memory cards. See Section 9.6 for options to swap identical channels. NXS0506 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2022. Al rights reserved
Product data sheet Rev. 1 — 31 January 2022 4 / 17
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Ordering information 5. Marking 6. Block diagram 7. Functional diagram 8. Pinning information 8.1. Pinning 8.2. Pin description 9. Functional description 9.1. Level translator 9.2. Enable and direction control 9.3. Feedback clock channel 9.4. EMI filter 9.5. ESD protection 9.6. Pin and channel naming 10. Limiting values 11. Recommended operating conditions 12. Static characteristics 13. Dynamic characteristics 13.1. Level translator 14. Application information 14.1. PCB design guidelines 15. Design and assembly recommendations 15.1. PCB design guidelines 15.2. PCB assembly guidelines for Pb-free soldering 16. Package outline 17. Abbreviations 18. Revision history 19. Legal information Contents