Datasheet WA1470 (WAVIoT) - 5

Datasheet WA1470 NB-Fi transceiver Pin Diagram
The following diagram shows the pin arrangement of the QFN package, top view.
A A A IXER D P UTp UTn Np Nn O O D P D_LN GN 32 TX 31 TX 30 GN 29 RX I RX I VDD M 28 27 26 VD 25 TMUX2 1 24 GND PA TMUX3 2 23 TX LDO PA TMUX4 3 22 VDD PA VDD_BIAS 4 21 VDD BB CHIP_EN 5 20 ADCref VDD_PLL 6 19 DFT TESTMODE XTAL_IN 7 18 BPSK Input VDDQ 8 17 TRX IRQ 9 EN 10 11 IN 12 13 G 14 15 O 16 OUT STB DI DIO NC GN VDDI / DFT LDO LK SI / DFT / DFTR SC ISO / DFT MO M CSB
Figure 2: PIN Diagram
Pin List & Description
Table 1: PIN Description
Pin Pin Name Description
1 GND_PA PA ESD Ground 2 TX_LDO_PA PA LDO output 3 VDD3P3V_PA PA ESD Supply 4 VDD3P3V_BB Base-Band ESD Supply Rev 5 – June 2020 Page 5 of 24 sales@waviot.com | www.waviot.com Document Outline Key Product Features General Description Applications Block Diagram & Chip Architecture Pin Diagram Pin List & Description Typical Connectivity Chip Modes Specifications ESD Ratings Operating Range Performance Specifications Description of the Registers eFuse Mirror Registers Non-eFuse Writable Registers Read Only Registers Packaging Information Contact Information