Datasheet ADuM1100 (Analog Devices) - 8

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ADuM1100 Data Sheet ELECTRICAL SPECIFICATIONS—MIXED 5 V/3 V OR 3 V/5 V OPERATION
All voltages are relative to their respective ground. 5 V/3 V operation: 4.5 V ≤ VDD1 ≤ 5.5 V, 3.0 V ≤ VDD2 ≤ 3.6 V. 3 V/5 V operation: 3.0 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V. All minimum/maximum specifications apply over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = 3.3 V, VDD2 = 5 V or VDD1 = 5 V, VDD2 = 3.3 V.
Table 3. Parameter Symbol Min Typ Max Unit Test Conditions
DC SPECIFICATIONS Input Supply Current, Quiescent IDDI (Q) 5 V/3 V Operation 0.3 0.8 mA 3 V/5 V Operation 0.1 0.3 mA Output Supply Current, Quiescent IDDO (Q) 5 V/3 V Operation 0.005 0.04 mA 3 V/5 V Operation 0.01 0.06 mA Input Supply Current, 25 Mbps IDDI (25) 5 V/3 V Operation 2.2 3.5 mA 12.5 MHz logic signal frequency 3 V/5 V Operation 2.0 2.8 mA 12.5 MHz logic signal frequency Output Supply Current1, 25 Mbps IDDO (25) 5 V/3 V Operation 0.3 0.7 mA 12.5 MHz logic signal frequency 3 V/5 V Operation 0.5 1.0 mA 12.5 MHz logic signal frequency Input Supply Current, 50 Mbps IDDI (50) 5 V/3 V Operation 4.5 7.0 mA 25 MHz logic signal frequency 3 V/5 V Operation 4.0 6.0 mA 25 MHz logic signal frequency Output Supply Current1, 50 Mbps IDDO (50) 5 V/3 V Operation 1.2 1.6 mA 25 MHz logic signal frequency 3 V/5 V Operation 1.0 1.5 mA 25 MHz logic signal frequency Input Currents IIA −10 +0.01 +10 μA 0 V ≤ VIA, VIB, VIC, VID ≤ VDD1 or VDD2 Logic High Output Voltage VOH VDD2 − 0.1 3.3 V IO = −20 μA, VI = VIH 5 V/3 V Operation VDD2 − 0.5 3.0 V IO = −2.5 mA, VI = VIH Logic Low Output Voltage VOL 0.0 0.1 V IO = 20 μA, VI = VIL 5 V/3 V Operation 0.04 0.1 V IO = 400 μA, VI = VIL 0.3 0.4 V IO = 2.5 mA, VI = VIL Logic High Output Voltage VOH VDD2 − 0.1 5.0 V IO = −20 μA, VI = VIH 3 V/5 V Operation VDD2 − 0.8 4.6 V IO = −4 mA, VI = VIH Logic Low Output Voltage VOL 0.0 0.1 V IO = 20 μA, VI = VIL 3 V/5 V Operation 0.03 0.1 V IO = 400 μA, VI = VIL 0.3 0.8 V IO = 4 mA, VI = VIL SWITCHING SPECIFICATIONS For ADuM1100AR Minimum Pulse Width2 PW 40 ns CL = 15 pF, CMOS signal levels Maximum Data Rate3 25 Mbps CL = 15 pF, CMOS signal levels For ADuM1100BR/ADuM1100UR Minimum Pulse Width2 PW 20 ns CL = 15 pF, CMOS signal levels Maximum Data Rate3 50 Mbps CL = 15 pF, CMOS signal levels For All Grades Propagation Delay Time to Logic tPHL, tPLH Low/High Output4, 5 5 V/3 V Operation (See Figure 9) 13 21 ns CL = 15 pF, CMOS signal levels 3 V/5 V Operation (See Figure 10) 16 26 ns CL = 15 pF, CMOS signal levels Rev. K | Page 8 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS—5 V OPERATION ELECTRICAL SPECIFICATIONS—3.3 V OPERATION ELECTRICAL SPECIFICATIONS—MIXED 5 V/3 V OR 3 V/5 V OPERATION PACKAGE CHARACTERISTICS REGULATORY INFORMATION INSULATION AND SAFETY-RELATED SPECIFICATIONS DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 INSULATION CHARACTERISTICS RECOMMENDED OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATION INFORMATION PC BOARD LAYOUT PROPAGATION DELAY-RELATED PARAMETERS METHOD OF OPERATION, DC CORRECTNESS, AND MAGNETIC FIELD IMMUNITY POWER CONSUMPTION OUTLINE DIMENSIONS ORDERING GUIDE