Datasheet GD32E505xx (GigaDevice) - 10
| Hersteller | GigaDevice |
| Beschreibung | Arm Cortex-M33 32-bit MCU |
| Seiten / Seite | 95 / 10 — 2.2. Block diagram. Figure 2-1. GD32E505xx block diagram |
| Dateiformat / Größe | PDF / 2.8 Mb |
| Dokumentensprache | Englisch |
2.2. Block diagram. Figure 2-1. GD32E505xx block diagram
Modelllinie für dieses Datenblatt
Textversion des Dokuments
GD32E505xx Datasheet
2.2. Block diagram Figure 2-1. GD32E505xx block diagram
TPIU SW/JTAG POR/ PDR C Flash o Flash ARM Cortex-M33 d Memory e Cbus Memory Processor Control er PLL S Fmax : 180MHz Fmax:180MHz ystem NVIC Master LDO FMC SQPI TMU CRC RCU 1.1V GP DMA 12 chs Slave AHB Peripherals Master AH IRC B OTGHS SRAM 8MHz M SRAM Master a Control er t Slave rix EXMC HXTAL Slave AHB to APB AHB to APB 4-32MHz Slave Bridge 2 Bridge 1 LVD Interrput request Powered By VDDA USART0 CAN0 Slave Slave USART5 WWDGT SPI0 TIMER1~3 12-bit ADC0~1 SPI1~2\ SAR ADC I2S1~2 Powered By VDDA EXTI USART1~2 GPIOA APB I2C0 APB GPIOB 2 : 1 : F I2C1 m F a m x a GPIOC x = = I2C2 180 90 GPIOD M M H H z Z FWDGT GPIOE RTC GPIOF DAC GPIOG TIMER4~6 TIMER0 UART3~4 TIMER7 CAN1~2 TIMER8~10 TIMER SHRTIMER 11~13 CMP1/3/5 CTC 9 Document Outline Table of Contents List of Figures List of Tables 1. General description 2. Device overview 2.1. Device information 2.2. Block diagram 2.3. Pinouts and pin assignment 2.4. Memory map 2.5. Clock tree 2.6. Pin definitions 2.6.1. GD32E505Zx LQFP144 pin definitions 2.6.2. GD32E505Vx LQFP100 pin definitions 2.6.3. GD32E505Rx LQFP64 pin definitions 3. Functional description 3.1. Arm® Cortex®-M33 core 3.2. Embedded memory 3.3. Clock, reset and supply management 3.4. Boot modes 3.5. Power saving modes 3.6. Analog to digital converter (ADC) 3.7. Digital to analog converter (DAC) 3.8. DMA 3.9. General-purpose inputs/outputs (GPIOs) 3.10. Timers and PWM generation 3.11. Real time clock (RTC) 3.12. Inter-integrated circuit (I2C) 3.13. Serial peripheral interface (SPI) 3.14. Universal synchronous asynchronous receiver transmitter (USART) 3.15. Inter-IC sound (I2S) 3.16. Universal serial bus High-Speed interface (USBHS) 3.17. Controller area network (CAN) 3.18. External memory controller (EXMC) 3.19. Comparators (CMP) 3.20. Trigonometric Math Unit (TMU) 3.21. Super High-Resolution Timer (SHRTIMER) 3.22. Serial/Quad Parallel Interface (SQPI) 3.23. Debug mode 3.24. Package and operation temperature 4. Electrical characteristics 4.1. Absolute maximum ratings 4.2. Operating conditions characteristics 4.3. Power consumption 4.4. EMC characteristics 4.5. Power supply supervisor characteristics 4.6. Electrical sensitivity 4.7. External clock characteristics 4.8. Internal clock characteristics 4.9. PLL characteristics 4.10. Memory characteristics 4.11. NRST pin characteristics 4.12. GPIO characteristics 4.13. Temperature sensor characteristics 4.14. ADC characteristics 4.15. DAC characteristics 4.16. Comparators characteristics 4.17. Trigonometric Math Unit (TMU) characteristics 4.18. I2C characteristics 4.19. SPI characteristics 4.20. I2S characteristics 4.21. USART characteristics 4.22. CAN characteristics 4.23. USBHS characteristics 4.24. EXMC characteristics 4.25. Serial/Quad Parallel Interface (SQPI) characteristics 4.26. Super High-Resolution Timer (SHRTIMER) characteristics 4.27. TIMER characteristics 4.28. WDGT characteristics 4.29. Parameter condition 5. Package information 5.1. LQFP144 package outline dimensions 5.2. LQFP100 package outline dimensions 5.3. LQFP64 package outline dimensions 6. Ordering information 7. Revision history
2.2. Block diagram Figure 2-1. GD32E505xx block diagram
TPIU SW/JTAG POR/ PDR C Flash o Flash ARM Cortex-M33 d Memory e Cbus Memory Processor Control er PLL S Fmax : 180MHz Fmax:180MHz ystem NVIC Master LDO FMC SQPI TMU CRC RCU 1.1V GP DMA 12 chs Slave AHB Peripherals Master AH IRC B OTGHS SRAM 8MHz M SRAM Master a Control er t Slave rix EXMC HXTAL Slave AHB to APB AHB to APB 4-32MHz Slave Bridge 2 Bridge 1 LVD Interrput request Powered By VDDA USART0 CAN0 Slave Slave USART5 WWDGT SPI0 TIMER1~3 12-bit ADC0~1 SPI1~2\ SAR ADC I2S1~2 Powered By VDDA EXTI USART1~2 GPIOA APB I2C0 APB GPIOB 2 : 1 : F I2C1 m F a m x a GPIOC x = = I2C2 180 90 GPIOD M M H H z Z FWDGT GPIOE RTC GPIOF DAC GPIOG TIMER4~6 TIMER0 UART3~4 TIMER7 CAN1~2 TIMER8~10 TIMER SHRTIMER 11~13 CMP1/3/5 CTC 9 Document Outline Table of Contents List of Figures List of Tables 1. General description 2. Device overview 2.1. Device information 2.2. Block diagram 2.3. Pinouts and pin assignment 2.4. Memory map 2.5. Clock tree 2.6. Pin definitions 2.6.1. GD32E505Zx LQFP144 pin definitions 2.6.2. GD32E505Vx LQFP100 pin definitions 2.6.3. GD32E505Rx LQFP64 pin definitions 3. Functional description 3.1. Arm® Cortex®-M33 core 3.2. Embedded memory 3.3. Clock, reset and supply management 3.4. Boot modes 3.5. Power saving modes 3.6. Analog to digital converter (ADC) 3.7. Digital to analog converter (DAC) 3.8. DMA 3.9. General-purpose inputs/outputs (GPIOs) 3.10. Timers and PWM generation 3.11. Real time clock (RTC) 3.12. Inter-integrated circuit (I2C) 3.13. Serial peripheral interface (SPI) 3.14. Universal synchronous asynchronous receiver transmitter (USART) 3.15. Inter-IC sound (I2S) 3.16. Universal serial bus High-Speed interface (USBHS) 3.17. Controller area network (CAN) 3.18. External memory controller (EXMC) 3.19. Comparators (CMP) 3.20. Trigonometric Math Unit (TMU) 3.21. Super High-Resolution Timer (SHRTIMER) 3.22. Serial/Quad Parallel Interface (SQPI) 3.23. Debug mode 3.24. Package and operation temperature 4. Electrical characteristics 4.1. Absolute maximum ratings 4.2. Operating conditions characteristics 4.3. Power consumption 4.4. EMC characteristics 4.5. Power supply supervisor characteristics 4.6. Electrical sensitivity 4.7. External clock characteristics 4.8. Internal clock characteristics 4.9. PLL characteristics 4.10. Memory characteristics 4.11. NRST pin characteristics 4.12. GPIO characteristics 4.13. Temperature sensor characteristics 4.14. ADC characteristics 4.15. DAC characteristics 4.16. Comparators characteristics 4.17. Trigonometric Math Unit (TMU) characteristics 4.18. I2C characteristics 4.19. SPI characteristics 4.20. I2S characteristics 4.21. USART characteristics 4.22. CAN characteristics 4.23. USBHS characteristics 4.24. EXMC characteristics 4.25. Serial/Quad Parallel Interface (SQPI) characteristics 4.26. Super High-Resolution Timer (SHRTIMER) characteristics 4.27. TIMER characteristics 4.28. WDGT characteristics 4.29. Parameter condition 5. Package information 5.1. LQFP144 package outline dimensions 5.2. LQFP100 package outline dimensions 5.3. LQFP64 package outline dimensions 6. Ordering information 7. Revision history