ISOSD61Device specificationsTable 11. Single-ended input and output signaling specifications (ISOSD61)ParameterSymbolMin.Typ.Max.UnitsConditions 2 V VDD = 3.3 V Input high voltage VIH VDD x 0.7 V VDD = 5 V 0.8 V VDD = 3.3 V Input low voltage VIL VDD x 0.3 V VDD = 5 V Input current IIND ±0.5 µA Input capacitance CIND 6 pF VDD = 5 V, VDD – 0.06 VDD – 0.04 V IOUT = -0.2 mA Output high voltage VOH VDD = 3.3 V, VDD – 0.05 VDD – 0.03 IOUT = -0.2 mA Output low voltage VOL 0.01 0.02 V IOUT = 0.2 mA Table 12. Package characteristicsParameterSymbolMin.Typ.Max.UnitsTest conditions IC junction-to-ambient thermal θ On a 2s2p JEDEC board in free air as per resistance JA 80 °C/W JEDEC JESD51, TA = 25°C DS13605 - Rev 3page 9/23 Document Outline Cover image Product status link / summary Features Application Description 1 Device overview 2 Pin description 3 Device specifications 4 Terminology 5 Theory of operation 6 Package description 7 Ordering information Revision history Contents List of tables List of figures