Datasheet ADP5134 (Analog Devices) - 3

HerstellerAnalog Devices
BeschreibungDual 3 MHz, 1200 mA Buck Regulators and Two 300 mA LDO Regulators With Precision Enable and Power-Good Output
Seiten / Seite28 / 3 — Data Sheet. ADP5134. SPECIFICATIONS GENERAL SPECIFICATIONS. Table 2. …
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DokumentenspracheEnglisch

Data Sheet. ADP5134. SPECIFICATIONS GENERAL SPECIFICATIONS. Table 2. Parameter. Symbol. Test Conditions/Comments. Min. Typ. Max. Unit

Data Sheet ADP5134 SPECIFICATIONS GENERAL SPECIFICATIONS Table 2 Parameter Symbol Test Conditions/Comments Min Typ Max Unit

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Data Sheet ADP5134 SPECIFICATIONS GENERAL SPECIFICATIONS
VAVIN = VVIN1 = VVIN2 = 2.5 V to 5.5 V, VVIN3 = VVIN4 = 1.7 V to 5.5 V, TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted.
Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT VOLTAGE RANGE VAVIN, VVIN1, 2.5 5.5 V VVIN2 THERMAL SHUTDOWN Threshold TSSD TJ rising 150 °C Hysteresis TSSD-HYS 20 °C START-UP TIME1 BUCK1 tSTART1 650 µs BUCK2 tSTART2 750 µs LDO1, LDO2 (Fast Soft Start) tSTART3 650 µs LDO1, LDO2 (Slow Soft Start) tSTART4 900 µs START-UP TIME, BUCK2 First BUCK2 tSTART5 750 µs BUCK1 tSTART6 300 µs LDO1, LDO2 (Fast Soft Start) tSTART7 300 µs LDO1, LDO2 (Slow Soft Start) tSTART8 600 µs SHUTDOWN CONTROL All ENx pins below VIL_EN level to achive ISHUTDOWN Level High VIH_EN TJ = −40°C to +85°C 0.9 V Level Low VIL_EN 0.35 V PRECISION ENABLE PINS (ENx) Regulator(s) activation/deactivation thresholds Analog Activation Threshold VENR Device out of shutdown (VENx > VIH_EN) 0.94 0.97 1 V Hysteresis (Regulator Deactivation) VENH 80 mV Input Leakage Current VI-LEAKAGE 0.05 1 µA POWER-GOOD PIN (PG) Monitors VOUT falling out of regulation Power-Good Falling Threshold VPGLOW At VOUT 90 % Power-Good Rising Threshold VPGHYS At VOUT 91 94 97 % Power-Good Delay tPGDLY 15 µs Power-Good Leakage Current IPGIQ VPG = VIN 1 µA Power-Good Output Voltage Low VPGOL Load current (ILOADx) = 1 mA 0.02 0.15 V MODE PIN Level High VIH_MOD 1.1 V Level Low VIL_MOD 0.4 V INPUT CURRENT All Channels Enabled ISTBY-NOSW No load, no buck switching 113 182 µA All Channels Disabled ISHUTDOWN TJ = −40°C to +85°C 0.3 1 µA VIN1 UNDERVOLTAGE LOCKOUT Low UVLO Input Voltage Rising UVLOVIN1RISE 2.45 V Low UVLO Input Voltage Falling UVLOVIN1FALL 1.95 V 1 Start-up time is defined as the time from EN1 = EN2 = EN3 = EN4 at 0 V to VAVIN to VOUT1, VOUT2, VOUT3, and VOUT4 reaching 90% of their nominal level. Start-up times are shorter for individual channels if another channel is already enabled. See the Typical Performance Characteristics section for more information. Rev. A | Page 3 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS GENERAL SPECIFICATIONS BUCK1 AND BUCK2 SPECIFICATIONS LDO1 AND LDO2 SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Power-Good Output Thermal Protection Undervoltage Lockout Precision Enable and Shutdown Control BUCK1 AND BUCK2 Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Oscillator and Phasing of Inductor Switching Short-Circuit Protection Buck Regulator Soft Start Current Limit 100% Duty Operation Active Pull-Down Resistors LDO1 AND LDO2 LDO Regulator Soft Start APPLICATIONS INFORMATION BUCK REGULATOR EXTERNAL COMPONENT SELECTION Feedback Resistors Inductor Output Capacitor Input Capacitor LDO REGULATOR EXTERNAL COMPONENT SELECTION Feedback Resistors Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties POWER DISSIPATION AND THERMAL CONSIDERATIONS BUCK REGULATOR POWER DISSIPATION LDO Regulator Power Dissipation JUNCTION TEMPERATURE PCB LAYOUT GUIDELINES TYPICAL APPLICATION SCHEMATICS BILL OF MATERIALS OUTLINE DIMENSIONS ORDERING GUIDE