Datasheet AD8488 (Analog Devices) - 5

Data Sheet AD8488 ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL CHARACTERIZATION Parameter Rating Table 3. Thermal Resistance—Normal Operation (1.4 W)
Voltage
Airflow Velocity
Supply (AVDD, DVDD) 5.5 V
(m/sec) Ambient θJA ΨJT ΨJB θJC Unit
Charge Input IN0 to IN127 −0.3 V to VREF + 0.3 V 0 85°C 18.6 0.20 8.3 4.4 °C/W Reference (VREF, VREF_ESD) 5.5 V 50°C 19.7 0.17 8.3 4.4 °C/W Logic Inputs −0.3 V to +5.5 V 25°C 20.6 0.16 8.3 4.4 °C/W Maximum Junction Temperature 125°C 1 85°C 15.8 0.32 8.2 4.4 °C/W Storage Temperature Range −30°C to +150°C 50°C 16.1 0.30 8.2 4.4 °C/W Input Charge to Integrator Channels 20 pC 25°C 16.4 0.29 8.2 4.4 °C/W Stresses above those listed under Absolute Maximum Ratings may 3 85°C 13.8 0.54 7.7 4.4 °C/W cause permanent damage to the device. This is a stress rating only; 50°C 14.0 0.53 7.7 4.4 °C/W functional operation of the device at these or any other conditions 25°C 14.2 0.52 7.7 4.4 °C/W above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum
Table 4. Thermal Resistance—Low Power Operation (0.5 W)
rating conditions for extended periods may affect device
Airflow Velocity
reliability.
(m/sec) Ambient θJA ΨJT ΨJB θJC Unit
0 85°C 19.0 0.19 8.3 4.4 °C/W
THERMAL DATA
50°C 20.2 0.16 8.3 4.4 °C/W ΨJB is the junction-to-board thermal characterization parameter 25°C 21.2 0.15 8.3 4.4 °C/W with a unit of °C/W. The ΨJB of the package is based on modeling 1 85°C 15.7 0.31 8.1 4.4 °C/W and calculation using a 4-layer board. The JESD51-12, Guidelines 50°C 16.2 0.29 8.1 4.4 °C/W for Reporting and Using Package Thermal Information, states that 25°C 16.4 0.28 8.1 4.4 °C/W thermal characterization parameters are not the same as thermal 3 85°C 13.8 0.54 7.8 4.4 °C/W resistances. ΨJB measures the component power flowing through 50°C 14.1 0.52 7.8 4.4 °C/W multiple thermal paths rather than a single path, as in thermal 25°C 14.2 0.51 7.8 4.4 °C/W resistance, θJB. Therefore, ΨJB thermal paths include convection Note that the thermal numbers are simulated per JEDEC JESD51-9 from the top of the package as wel as radiation from the package, on a 4-layer printed circuit board size = 101.5 mm × 114.5 mm. factors that make ΨJB more useful in real-world applications. Maximum junction temperature (T J) is calculated from the board temperature (TB) and power dissipation (PD) using the formula
ESD CAUTION
TJ = TB + (PD × ΨJB) Refer to JESD51-8 and JESD51-12 for more detailed information about ΨJB. Rev. A | Page 5 of 20 Document Outline Features Application General Description Functional Block Diagram Table of Contents Revision History Specifications Absolute Maximum Ratings Thermal Data Thermal Characterization ESD Caution Pin Configuration and Function Descriptions Signal Mnemonics Typical Performance Characteristics Theory of Operation Overview Analog Amplifier Troubleshooting Channels Timing Signals Timing Notes Applications Information Control Register Bit Maps Timing Diagrams Outline Dimensions Ordering Guide