Datasheet ADRF5515 (Analog Devices) - 6

ADRF5515 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS -CHA CHA CHA RM C C C ND E ND ND DD1- C DD2- G T NI NI G G V NI NI V 40 39 38 37 36 35 34 33 32 31 GND 1 30 GND GND 2 29 RXOUT-CHA ANT-CHA 3 28 GND GND 4 27 BP-CHA SWCTRL-CHAB 5 ADRF5515 26 PD-CHAB SWVDD-CHAB 6 TOP VIEW 25 NIC GND 7 (Not to Scale) 24 BP-CHB ANT-CHB 8 23 GND GND 9 22 RXOUT-CHB GND 10 21 GND 11 12 13 14 15 16 17 18 19 20 C C C C ND NI ND ND NI NI NI G -CHB G G CHB CHB RM E DD1- DD2- T V V NOTES 1. NIC = NOT INTERNALLY CONNECTED. IT IS RECOMMENDED TO CONNECT NIC TO THE RF GROUND OF THE PCB.
002
2. EXPOSED PAD. THE EXPOSED PAD MUST BE CONNECTED TO RF OR DC GROUND.
23029- Figure 2. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1, 2, 4, 7, 9 to 11, 15, 16, 21, 23, GND Ground. 28, 30, 35, 36, 40 3 ANT-CHA RF Input to Channel A. The ANT-CHA pin is ac-coupled to 0 V and matched to 50 Ω. Matching and a dc blocking capacitor are not required. 5 SWCTRL-CHAB Control Voltage for Switches on Channel A and Channel B. 6 SWVDD-CHAB Supply Voltage for Switches on Channel A and Channel B. 8 ANT-CHB RF Input to Channel B. The ANT-CHB pin is ac-coupled to 0 V and matched to 50 Ω. Matching and a dc blocking capacitor are not required. 12 TERM-CHB Termination Output for Channel B. The TERM-CHB pin is the transmitter path for Channel B. The TERM-CHB pin is ac-coupled to 0 V and matched to 50 Ω. No matching and dc blocking capacitor required. 13, 14, 18, 19, 25, 32, 33, 37, 38 NIC Not Internally Connected. It is recommended to connect NIC to the RF ground of the PCB. 17 VDD1-CHB Supply Voltage for Stage 1 LNA on Channel B. 20 VDD2-CHB Supply Voltage for Stage 2 LNA on Channel B. 22 RXOUT-CHB Receiver Output. The RXOUT-CHB pin is the receiver path for Channel B. The RXOUT- CHB pin is ac matched to 50 Ω. No matching component is required. A dc blocking capacitor is required. 24 BP-CHB Bypass Second Stage LNA of Channel B. 26 PD-CHAB Power-Down All Stages of LNA for Channel A and Channel B. 27 BP-CHA Bypass Second Stage LNA of Channel A. 29 RXOUT-CHA Receiver Output. The RXOUT-CHA pin is the receiver path for Channel A. The RXOUT- CHA pin is ac matched to 50 Ω. No matching component is required. A dc blocking capacitor is required. 31 VDD2-CHA Supply Voltage for Stage 2 LNA on Channel A. 34 VDD1-CHA Supply Voltage for Stage 1 LNA on Channel A. 39 TERM-CHA Termination Output for Channel A. The TERM-CHA pin is the transmitter path for Channel A. The TERM-CHA pin is ac-coupled to 0 V and matched to 50 Ω. No matching and dc blocking capacitor required. EPAD Exposed Pad. The exposed pad must be connected to RF or dc ground. Rev. 0 | Page 6 of 15 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ELECTROSTATIC DISCHARGE (ESD) RATINGS ESD Ratings for ADRF5515 ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS RECEIVE OPERATION, HIGH GAIN MODE RECEIVE OPERATION, LOW GAIN MODE TRANSMIT OPERATION THEORY OF OPERATION SIGNAL PATH SELECT Transmit Operation Receive Operation BIASING SEQUENCE APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE