Datasheet HMC981LP3E (Analog Devices) - 7
| Hersteller | Analog Devices |
| Beschreibung | ACTIVE BIAS CONTROLLER |
| Seiten / Seite | 17 / 7 — HMC981LP3E. ACTIVE BIAS CONTROLLER. Pin Descriptions. 13 - 7 |
| Dateiformat / Größe | PDF / 998 Kb |
| Dokumentensprache | Englisch |
HMC981LP3E. ACTIVE BIAS CONTROLLER. Pin Descriptions. 13 - 7
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HMC981LP3E
v01.0411
ACTIVE BIAS CONTROLLER Pin Descriptions
Pin Number Function Description Interface Schematic Bias supply Pin. Connect supply voltage 1, 5 VDD, VDIG to this pin with appropriate filtering. Control voltage of the VG2. Use a resistor divider between 2 VG2CONT VDD and GND to set the voltage. VG2 is typically 1.3V lower than the VG2CONT 10 VG2 Second gate control. 13 Internal switch resistance control pin. If left floating, VSW 3 SW defaults to HIGH. T Enable pin. System is enabled when Ven is HIGH (VDIG). If 4 EN M left floating, Ven defaults to HIGH (enabled). Disables short circuit lock down when pulled to ground. 14 DISBLSC Leave it floating to enable short circuit lock down. S - S R LLE Negative voltage generator charge pump output. Negative O voltage generator needs a flying capacitor, a reservoir 6 CPOUT capacitor and two diodes to operate. Please refer to the R application schematic for more info. T N O Control pin for VGATEFB. Float VGATEFB when a S C depletion mode transistor is biased. Selects the mode of 7 VGATEFB operation along with VNEGFB pin. For detailed usage IA please refer to the Table 2. B Feedback (Control) pin for Negative Voltage Generator Charge Pump. Float to activate the negative voltage 8 VNEGFB generator / Sort to GND to disable the negative voltage generator. Negative input to the chip. Should be supplied with CPOUT when negative voltage generator is enabled, or connect to 9 VNEG external VSS when negative voltage generator is enabled. For detailed usage please refer to the “Negative Voltage Generator” section. Information furnish F e o d r p by A rnic alo e g , d Devi ecleis vie s rby eli, a eve nd t d to b o p e a l cc a ur c at e o e an r d d releiars ble , p . Ho le we a vesr, e c no For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other ontact Hittite Microwave Corporation: One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 2 Elizabeth Drive, Chelmsford, MA 01824 Phon rights of third parties that may result from its use. Specifications subject to change without notice. No e: 9 Ph 7 o 8 n - e 2 : 750 81- - 3 3 2 3 9- 4 4 3 F 70 ax 0 • O : 9 rde 7 r o8 nl-i2 n 50 e at -33 ww 7 w. 3
13 - 7
license is granted by implication or otherwise under any patent or patent rights of Analog Devices. analog.com Order On- Trademarks and registered trademarks are the property of their respective owners. line at www.hi A tptiptliec.actio o m n Support: Phone: 1-800-ANALOG-D
v01.0411
ACTIVE BIAS CONTROLLER Pin Descriptions
Pin Number Function Description Interface Schematic Bias supply Pin. Connect supply voltage 1, 5 VDD, VDIG to this pin with appropriate filtering. Control voltage of the VG2. Use a resistor divider between 2 VG2CONT VDD and GND to set the voltage. VG2 is typically 1.3V lower than the VG2CONT 10 VG2 Second gate control. 13 Internal switch resistance control pin. If left floating, VSW 3 SW defaults to HIGH. T Enable pin. System is enabled when Ven is HIGH (VDIG). If 4 EN M left floating, Ven defaults to HIGH (enabled). Disables short circuit lock down when pulled to ground. 14 DISBLSC Leave it floating to enable short circuit lock down. S - S R LLE Negative voltage generator charge pump output. Negative O voltage generator needs a flying capacitor, a reservoir 6 CPOUT capacitor and two diodes to operate. Please refer to the R application schematic for more info. T N O Control pin for VGATEFB. Float VGATEFB when a S C depletion mode transistor is biased. Selects the mode of 7 VGATEFB operation along with VNEGFB pin. For detailed usage IA please refer to the Table 2. B Feedback (Control) pin for Negative Voltage Generator Charge Pump. Float to activate the negative voltage 8 VNEGFB generator / Sort to GND to disable the negative voltage generator. Negative input to the chip. Should be supplied with CPOUT when negative voltage generator is enabled, or connect to 9 VNEG external VSS when negative voltage generator is enabled. For detailed usage please refer to the “Negative Voltage Generator” section. Information furnish F e o d r p by A rnic alo e g , d Devi ecleis vie s rby eli, a eve nd t d to b o p e a l cc a ur c at e o e an r d d releiars ble , p . Ho le we a vesr, e c no For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other ontact Hittite Microwave Corporation: One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 2 Elizabeth Drive, Chelmsford, MA 01824 Phon rights of third parties that may result from its use. Specifications subject to change without notice. No e: 9 Ph 7 o 8 n - e 2 : 750 81- - 3 3 2 3 9- 4 4 3 F 70 ax 0 • O : 9 rde 7 r o8 nl-i2 n 50 e at -33 ww 7 w. 3
13 - 7
license is granted by implication or otherwise under any patent or patent rights of Analog Devices. analog.com Order On- Trademarks and registered trademarks are the property of their respective owners. line at www.hi A tptiptliec.actio o m n Support: Phone: 1-800-ANALOG-D