Datasheet HMC980LP4E (Analog Devices) - 9

HMC980LP4E
v01.0911
ACTIVE BIAS CONTROLLER HIGH CURRENT Pin Descriptions
Pin Number Function Description Interface Schematic T Bias supply Pin. Connect supply voltage to this pin with 1,2 VDD M appropriate filtering. Control pins for internal switch resistance. If left floating, default to HIGH. 3.4 S0,S1 Refer to Table-1 in Application Notes for recommended T - S settings N E Enable pin. Bias control loop is enabled when Ven M 5 EN is HIGH(VDIG). If left floating, Ven defaults to HIGH E (enabled). G A N Over/under current alarm. Provides an active high signal A 6 ALM (VDIG) if the quiescent bias exceed the upper threshold or drops below the lower threshold. R M E Trigger out signal. Generates a HIGH (3.3V) signal when the active bias system stabilizes. This signal can be 19 TRIGOUT W used to trigger next device (ENABLE) if more than one HMC980LP4E is used in a daisy chain. O Bias supply for negative voltage generator. Connect 7 CP_VDD supply voltage with appropriate filtering. CP_VDD C P supply voltage should be same as VDD D Negative voltage generator charge pump output. Nega- 8 CP_OUT tive voltage generator requires a flying capacitor, a reservoir capacitor and two diodes to operate. 3.3V-5V Digital Bias supply Pin. Connect supply voltage 9 VDIG to this pin with appropriate filtering.. 10 VREF 1.44V reference voltage. For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373
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Order On-line at www.hittite.com Document Outline Typical Applications Features Functional Diagram General Description Electrical Specifications Typical Performance Characteristics Bias Current Accuracy[1] Bias Current Accuracy[2] Power Up Waveform Shutdown Waveform Enable Waveform Disable Waveform Load Regulation @ VDD=5V, VDIG=3.3V, SW0=GND, SW1=GND Load Regulation @ VDD=5V, VDIG=3.3V, SW0=3.3V, SW1=GND Load Regulation @ VDD=16.5V, VDIG=5.0V, SW0=GND, SW1=VDIG Load Regulation @ VDD=16.5V, VDIG=5.0V, SW0=VDIG, SW1=VDIG VNEG Load Regulation @ VDD=5V VNEG Load Regulation @ VDD=16.5V VNEG Load Transient VDD=5V VNEG Load Transient VDD=16.5V VGATE Load Regulation @ VDD=12V [1] VG2 Load Regulation @ VDD=12V [2] VNEG Line Regulation vs. Supply Voltage Absolute Maximum Ratings Outline Drawing Package Information Pin Descriptions Evaluation Board Circuit Evaluation PCB List of Materials for Evaluation PCB Application Notes Detailed Description Digital Power Supply (VDIG) Supply and Drain Voltage (VDD and VDRAIN) Table 1. REcommended Current Range Configuration Negative Voltage Generator (VNEGOUT) Enable/Disable (EN) Active Bias Control Loop VG2 Voltage Adjustment Self Protection Feature VNEG Fault Detection Feature Over/Under Current Alarm Power-up and Enable Sequencing Daisy-Chain Operation Operation Modes Table 2 - The List of Bias Settings for Various Hittite Amplifiers Table 3 - List of Bias Settings for Various Hittite Amplifiers