Datasheet HMC8415LP6GE (Analog Devices) - 5
| Hersteller | Analog Devices |
| Beschreibung | 40 W (46 dBm), 9 GHz to 10.5 GHz, GaN Power Amplifier |
| Seiten / Seite | 23 / 5 — Data Sheet. HMC8415LP6GE. ABSOLUTE MAXIMUM RATINGS Table 4. THERMAL … |
| Revision | A |
| Dateiformat / Größe | PDF / 518 Kb |
| Dokumentensprache | Englisch |
Data Sheet. HMC8415LP6GE. ABSOLUTE MAXIMUM RATINGS Table 4. THERMAL RESISTANCE. Parameter. Rating. Table 5. Thermal Resistance
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Data Sheet HMC8415LP6GE ABSOLUTE MAXIMUM RATINGS Table 4. THERMAL RESISTANCE Parameter Rating
Thermal performance is directly linked to printed circuit board Bias Voltage (PCB) design and operating environment. Careful attention to Drain (VDDxA/VDDxB) 35 V dc PCB thermal design is required. Gate (VGGxA/VGGxB) −8 V dc to −1 V dc θJC is the junction to case thermal resistance. Radio Frequency Input Power (RFIN) 30 dBm Maximum Drain Bias
Table 5. Thermal Resistance
Pulse Width (PW) 500 µs
Package Type1, 2 θJC Unit
Duty Cycle 20% CP-40-7 1.33 °C/W Maximum Pulsed Power Dissipation, PDISS 105.3 W 1 The thermal resistance (θ (T JC) was determined by measuring θJC under the BASE = 85°C, Derate 752 mW/°C Above following conditions: the heat transfer is due solely to the thermal 85°C), Drain Bias Pulse Width = 200 µs at conduction from the channel through the ground pad to the PCB, and the 20% Duty Cycle ground pad is held constant at the operating temperature of 85°C. 2 Nominal Pulsed Peak Channel Temperature, 162°C Drain bias pulse width = 200 µs at 20% duty cycle. Drain Bias Pulse Width = 200 µs at 20% Duty Cycle, PIN = 23 dBm, PDISS = 58 W at 9.0 GHz
ESD CAUTION
Maximum Channel Temperature 225°C Maximum Peak Reflow Temperature for 260°C Moisture Sensitivity Level 3 (MSL3)1 Storage Temperature Range −65°C to +150°C Operating Temperature Range −40°C to +85°C Electrostatic Discharge (ESD) Sensitivity Human Body Model (HBM) Class 1A, Passed 250 V 1 See the Ordering Guide section for additional information. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. A | Page 5 of 23 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS TOTAL TARGET QUIESCENT CURRENT BY VDDxA/VDDxB ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT AND PULSOR CIRCUIT USING THE EV1HMC8415LP6G WITH THE DRAIN BIAS PULS0R BOARD RECOMMENDED BIAS SEQUENCE Power-Up Bias Concept for the EV1HMC8415LP6G with the Pulsor Power-Down Bias Concept for the EV1HMC8415LP6G with the Pulsor MAKING AVERAGE TO PULSED APPROXIMATIONS EVALUATION PCB BILL OF MATERIALS OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet HMC8415LP6GE ABSOLUTE MAXIMUM RATINGS Table 4. THERMAL RESISTANCE Parameter Rating
Thermal performance is directly linked to printed circuit board Bias Voltage (PCB) design and operating environment. Careful attention to Drain (VDDxA/VDDxB) 35 V dc PCB thermal design is required. Gate (VGGxA/VGGxB) −8 V dc to −1 V dc θJC is the junction to case thermal resistance. Radio Frequency Input Power (RFIN) 30 dBm Maximum Drain Bias
Table 5. Thermal Resistance
Pulse Width (PW) 500 µs
Package Type1, 2 θJC Unit
Duty Cycle 20% CP-40-7 1.33 °C/W Maximum Pulsed Power Dissipation, PDISS 105.3 W 1 The thermal resistance (θ (T JC) was determined by measuring θJC under the BASE = 85°C, Derate 752 mW/°C Above following conditions: the heat transfer is due solely to the thermal 85°C), Drain Bias Pulse Width = 200 µs at conduction from the channel through the ground pad to the PCB, and the 20% Duty Cycle ground pad is held constant at the operating temperature of 85°C. 2 Nominal Pulsed Peak Channel Temperature, 162°C Drain bias pulse width = 200 µs at 20% duty cycle. Drain Bias Pulse Width = 200 µs at 20% Duty Cycle, PIN = 23 dBm, PDISS = 58 W at 9.0 GHz
ESD CAUTION
Maximum Channel Temperature 225°C Maximum Peak Reflow Temperature for 260°C Moisture Sensitivity Level 3 (MSL3)1 Storage Temperature Range −65°C to +150°C Operating Temperature Range −40°C to +85°C Electrostatic Discharge (ESD) Sensitivity Human Body Model (HBM) Class 1A, Passed 250 V 1 See the Ordering Guide section for additional information. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. A | Page 5 of 23 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS TOTAL TARGET QUIESCENT CURRENT BY VDDxA/VDDxB ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT AND PULSOR CIRCUIT USING THE EV1HMC8415LP6G WITH THE DRAIN BIAS PULS0R BOARD RECOMMENDED BIAS SEQUENCE Power-Up Bias Concept for the EV1HMC8415LP6G with the Pulsor Power-Down Bias Concept for the EV1HMC8415LP6G with the Pulsor MAKING AVERAGE TO PULSED APPROXIMATIONS EVALUATION PCB BILL OF MATERIALS OUTLINE DIMENSIONS ORDERING GUIDE