Datasheet ADTR1107 (Analog Devices) - 8

ADTR1107 Data Sheet INTERFACE SCHEMATICS GND VDD_LNA
003 6- 008 14 6- 22 2214 Figure 3. GND Interface Schematic Figure 8. VDD_LNA Interface Schematic 4
ANT
-00 146 22 009 46-
VGG_LNA
221 Figure 4. ANT Interface Schematic Figure 9. VGG_LNA Interface Schematic
VDD_SW RX_OUT VDD_SW 8kΩ
010 6- 14 22
CTRL_SW
5 00 46- 221 Figure 5. CTRL_SW and VDD_SW Interface Schematic Figure 10. RX_OUT Interface Schematic
VDD_PA TX_IN
1
2.5kΩ
-01 6 14 006 22 46- 221 Figure 6. VDD_PA Interface Schematic Figure 11. TX_IN Interface Schematic 7 -00
VGG_PA
146 22 Figure 7. VGG_PA Interface Schematic Rev. A | Page 8 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS TRANSMIT STATE RECEIVE STATE THEORY OF OPERATION APPLICATIONS INFORMATION RECOMMENDED BIAS SEQUENCING TYPICAL APPLICATION CIRCUIT INTERFACING THE ADTR1107 TO THE ADAR1000 X BAND AND KU BAND BEAMFORMER OUTLINE DIMENSIONS ORDERING GUIDE