ADPA7007Data SheetPIN CONFIGURATION AND FUNCTION DESCRIPTIONSUTEFOETNDNDVRGRFGVD1817161514V1DD113 VDD2V2DD312 VDD4ADPA7007V3DD511 VDD6V4GG110 VGG256789CCNINDFINNDNIGRGNOTES 1. NIC = NO INTERNAL CONNECTION. NOTETHAT DATA SHOWN HEREIN WAS MEASURED WITH THESE PINS EXTERNALLY CONNECTED TO RF AND DC GROUND. 002 2. EXPOSED PAD. THE EXPOSED PAD MUST BECONNECTED TO RF AND DC GROUND. 21544- Figure 2. Pin Configuration Table 7. Pin Function Descriptions Pin No.MnemonicDescription 1, 2, 3, 11, 12, 13 VDD1, VDD3, VDD5, Drain Bias for the Amplifier. VDD6, VDD4, VDD2 4, 10 VGG1, VGG2 Amplifier Gate Control. ESD protection diodes are included and turn on below −1.5 V. 5, 9 NIC Not Internally Connected. Note that data shown herein was measured with these pins externally connected to RF and dc ground. 6, 8, 15, 17 GND Ground Pins. Connect the GND pins and the exposed pad to RF and dc ground. 7 RFIN RF Signal Input. This pin is ac-coupled and internally matched to 50 Ω. 14 VDET Detector Diode Used for Measuring the RF Output Power. Detection via VDET requires the application of a dc bias voltage through an external series resistor. Used in combination with VREF, the difference voltage, VREF − VDET, is a temperature compensated dc voltage proportional to the RF output power. 16 RFOUT RF Signal Output. RFOUT is ac-coupled and internally matched to 50 Ω. 18 VREF Reference Diode Used for Temperature Compensation of VDET RF Output Power Measurements. Detection via VERF requires the application of a dc bias voltage through an external series resistor. Used in combination with VDET, this voltage provides temperature compensation to VDET RF output power measurements. EPAD Exposed Pad. The exposed pad must be connected to RF and dc ground. Rev. 0 | Page 6 of 23 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 20 GHz TO 26 GHz FREQUENCY RANGE 26 GHz TO 34 GHz FREQUENCY RANGE 34 GHz TO 44 GHz FREQUENCY RANGE ABSOLUTE MAXIMUM RATINGS ELECTROSTATIC DISCHARGE (ESD) RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS CONSTANT IDD OPERATION THEORY OF OPERATION APPLICATIONS INFORMATION BIASING ADPA7007 WITH THE HMC980LP4E APPLICATION CIRCUIT SETUP LIMITING VGATE AND VNEG FOR ADPA7007 VGGX ABSOLUTE MAXIMUM RATING REQUIREMENT HMC980LP4E BIAS SEQUENCE Power-Up Sequence Power-Down Sequence CONSTANT DRAIN CURRENT BIASING vs. CONSTANT GATE VOLTAGE BIASING OUTLINE DIMENSIONS ORDERING GUIDE