Datasheet ADPA9002 (Analog Devices) - 6
| Hersteller | Analog Devices |
| Beschreibung | GaAs, pHEMT, MMIC, Single Positive Supply, DC to 10 GHz Power Amplifier |
| Seiten / Seite | 19 / 6 — ADPA9002. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. ACG. … |
| Dateiformat / Größe | PDF / 319 Kb |
| Dokumentensprache | Englisch |
ADPA9002. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. ACG. GND 1. 24 GND. NIC 2. 23 NIC. NIC 3. 22 GND. GND 4. 21 RFOUT/VDD
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ADPA9002 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 C C C C ND ND G NI ACG ACG NI NI NI G 32 31 30 29 28 27 26 25 GND 1 24 GND NIC 2 23 NIC NIC 3 22 GND GND 4 ADPA9002 21 RFOUT/VDD RFIN 5 TOP VIEW 20 GND (Not to Scale) GND 6 19 NIC NIC 7 18 NIC GND 8 17 GND 9 10 11 12 13 14 15 16 PACKAGE C C C C 3 BASE ND NI NI NI NI ND G GG1V G ACG GND NOTES 1. NIC = NOT INTERNALLY CONNECTED. THESE PINS MUST BE CONNECTED TO RF AND DC GROUND. 2. EXPOSED PAD. THE EXPOSED PAD MUST BE
002
CONNECTED TO RF AND DC GROUND.
21196- Figure 2. Pin Configuration
Table 6. Pin Function Descriptions Pin No. Mnemonic Description
1, 4, 6, 8, 9, 16, 17, 20, GND Ground. These pins must be connected to RF and dc ground. 22, 24, 25, 32 2, 3, 7, 10, 11, 12, 14, 18, NIC Not Internally Connected. These pins must be connected to RF and dc ground. 19, 23, 26, 27, 28, 31 5 RFIN RF Input. This pin is dc-coupled and matched to 50 Ω. See Figure 6 for the interface schematic. 13 VGG1 Gate Voltage. This pin is used for external bias operation of the device. If grounded, the amplifier runs in self biased mode at the standard current of 385 mA. Adjusting the voltage above or below the ground potential controls the drain current. External bypass capacitors are required (see Figure 62). See Figure 7 for the interface schematic. 15, 29, 30 ACG3, ACG2, ACG1 AC Ground Pins. These pins are used for low frequency termination. External bypass capacitor required (see Figure 62). See Figure 4 and Figure 5 for the interface schematics. 21 RFOUT/VDD RF Output for the Amplifier (RFOUT). Drain Voltage (VDD). Connect the VDD network to provide the drain current (IDD) (see Figure 62). See Figure 5 for the interface schematic. EPAD Exposed Pad. The exposed pad must be connected to RF and dc ground. Rev. 0 | Page 6 of 19 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC TO 2 GHz 2 GHz TO 5 GHz 5 GHz TO 10 GHz ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS CONSTANT IDD OPERATION THEORY OF OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT OUTLINE DIMENSIONS ORDERING GUIDE
ADPA9002 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 C C C C ND ND G NI ACG ACG NI NI NI G 32 31 30 29 28 27 26 25 GND 1 24 GND NIC 2 23 NIC NIC 3 22 GND GND 4 ADPA9002 21 RFOUT/VDD RFIN 5 TOP VIEW 20 GND (Not to Scale) GND 6 19 NIC NIC 7 18 NIC GND 8 17 GND 9 10 11 12 13 14 15 16 PACKAGE C C C C 3 BASE ND NI NI NI NI ND G GG1V G ACG GND NOTES 1. NIC = NOT INTERNALLY CONNECTED. THESE PINS MUST BE CONNECTED TO RF AND DC GROUND. 2. EXPOSED PAD. THE EXPOSED PAD MUST BE
002
CONNECTED TO RF AND DC GROUND.
21196- Figure 2. Pin Configuration
Table 6. Pin Function Descriptions Pin No. Mnemonic Description
1, 4, 6, 8, 9, 16, 17, 20, GND Ground. These pins must be connected to RF and dc ground. 22, 24, 25, 32 2, 3, 7, 10, 11, 12, 14, 18, NIC Not Internally Connected. These pins must be connected to RF and dc ground. 19, 23, 26, 27, 28, 31 5 RFIN RF Input. This pin is dc-coupled and matched to 50 Ω. See Figure 6 for the interface schematic. 13 VGG1 Gate Voltage. This pin is used for external bias operation of the device. If grounded, the amplifier runs in self biased mode at the standard current of 385 mA. Adjusting the voltage above or below the ground potential controls the drain current. External bypass capacitors are required (see Figure 62). See Figure 7 for the interface schematic. 15, 29, 30 ACG3, ACG2, ACG1 AC Ground Pins. These pins are used for low frequency termination. External bypass capacitor required (see Figure 62). See Figure 4 and Figure 5 for the interface schematics. 21 RFOUT/VDD RF Output for the Amplifier (RFOUT). Drain Voltage (VDD). Connect the VDD network to provide the drain current (IDD) (see Figure 62). See Figure 5 for the interface schematic. EPAD Exposed Pad. The exposed pad must be connected to RF and dc ground. Rev. 0 | Page 6 of 19 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC TO 2 GHz 2 GHz TO 5 GHz 5 GHz TO 10 GHz ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS CONSTANT IDD OPERATION THEORY OF OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT OUTLINE DIMENSIONS ORDERING GUIDE