Datasheet HMC903LP3E (Analog Devices) - 7
| Hersteller | Analog Devices |
| Beschreibung | GaAs, pHEMT, MMIC, Low Noise Amplifier, 6 GHz to 17 GHz |
| Seiten / Seite | 13 / 7 — Data Sheet. HMC903LP3E. Bm) d. Bm) d (. B (. +85°C. +25°C. –40°C. … |
| Revision | I |
| Dateiformat / Größe | PDF / 312 Kb |
| Dokumentensprache | Englisch |
Data Sheet. HMC903LP3E. Bm) d. Bm) d (. B (. +85°C. +25°C. –40°C. FREQUENCY (GHz). +85°C +25°C –40°C. –10. –20. , P. IO T. N (. –30. AI , G. SE I. –40. EVER
Modelllinie für dieses Datenblatt
Textversion des Dokuments
Data Sheet HMC903LP3E 25 25 20 20 15 15 Bm) d Bm) d ( B ( AT 1d S P 10 P 10 5 5 +85°C +85°C +25°C +25°C –40°C –40°C 0 0 6 8 10 12 14 16 18
014
6 8 10 12 14 16 18
017
FREQUENCY (GHz)
14479-
FREQUENCY (GHz)
14479- Figure 14. Output Power for 1 dB Compression (P1dB) vs. Frequency for Figure 17. Saturated Output Power (PSAT) vs. Frequency for Various Temperatures (Board Loss Removed from Gain, Power, and Various Temperatures (Board Loss Removed from Gain, Power, and Noise Figure Measurements) Noise Figure Measurements)
0 24 +85°C +25°C –40°C –10 20 ) %) B ( 16 (d AE N –20 , P IO T B) A d 12 L N ( –30 SO AI , G 8 SE I –40 Bm) d EVER ( 4 R UT OP –50 0 GAIN POUT PAE –60 –4 6 8 10 12 14 16 18
015
–20 –17 –14 –11 –8 –5 –2 1 4
018
FREQUENCY (GHz)
14479-
INPUT POWER (dBm)
14479- Figure 15. Reverse Isolation vs. Frequency for Various Temperatures Figure 18. Output Power (POUT), Gain, and Power Added Efficiency (PAE) vs. Input Power (Board Loss Removed from Gain, Power, and Noise Figure Measurements)
22 7 20 6 18 5 ) Bm) d dB ( B ( E 16 4 R 1d GAIN , P P1dB B) 14 3 FIGU d NOISE FIGURE E N ( OIS AI N G 12 2 10 1 8 0 3.0 3.5 4.0
016
VDD (V)
14479- Figure 16. Gain, Output Power for 1 dB Compression (P1dB), and Noise Figure vs. Supply Voltage (VDD) at 12 GHz (Board Loss Removed from Gain, Power, and Noise Figure Measurements) Rev. I | Page 7 of 13 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications 6 GHz to 16 GHz Frequency Range 16 GHz to 17 GHz Frequency Range Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Theory of Operation Applications Information Recommended Bias Sequence During Power Up Recommended Bias Sequence During Power Down Evaluation PCB Typical Application Circuits Outline Dimensions Ordering Guide
014
6 8 10 12 14 16 18
017
FREQUENCY (GHz)
14479-
FREQUENCY (GHz)
14479- Figure 14. Output Power for 1 dB Compression (P1dB) vs. Frequency for Figure 17. Saturated Output Power (PSAT) vs. Frequency for Various Temperatures (Board Loss Removed from Gain, Power, and Various Temperatures (Board Loss Removed from Gain, Power, and Noise Figure Measurements) Noise Figure Measurements)
0 24 +85°C +25°C –40°C –10 20 ) %) B ( 16 (d AE N –20 , P IO T B) A d 12 L N ( –30 SO AI , G 8 SE I –40 Bm) d EVER ( 4 R UT OP –50 0 GAIN POUT PAE –60 –4 6 8 10 12 14 16 18
015
–20 –17 –14 –11 –8 –5 –2 1 4
018
FREQUENCY (GHz)
14479-
INPUT POWER (dBm)
14479- Figure 15. Reverse Isolation vs. Frequency for Various Temperatures Figure 18. Output Power (POUT), Gain, and Power Added Efficiency (PAE) vs. Input Power (Board Loss Removed from Gain, Power, and Noise Figure Measurements)
22 7 20 6 18 5 ) Bm) d dB ( B ( E 16 4 R 1d GAIN , P P1dB B) 14 3 FIGU d NOISE FIGURE E N ( OIS AI N G 12 2 10 1 8 0 3.0 3.5 4.0
016
VDD (V)
14479- Figure 16. Gain, Output Power for 1 dB Compression (P1dB), and Noise Figure vs. Supply Voltage (VDD) at 12 GHz (Board Loss Removed from Gain, Power, and Noise Figure Measurements) Rev. I | Page 7 of 13 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications 6 GHz to 16 GHz Frequency Range 16 GHz to 17 GHz Frequency Range Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Theory of Operation Applications Information Recommended Bias Sequence During Power Up Recommended Bias Sequence During Power Down Evaluation PCB Typical Application Circuits Outline Dimensions Ordering Guide