link to page 13 ADL9006Data SheetPIN CONFIGURATION AND FUNCTION DESCRIPTIONSCCCCCNDDDNDGVNININININIG3231302928272625GND 124 GNDV2GG223 NICGND 322 GNDADL9006RFIN 421 RFOUTTOP VIEWGND 520 GND(Not to Scale)NIC 619 NICNIC 718 NICGND 817 GND910111213141516CCCCCCNDNININININININDGGNOTES 1. NIC = NO INTERNAL CONNECTION. SOLDER THENIC PINS TO A LOW IMPEDANCE GROUND PLANE. 002 2. EXPOSED PAD. THE EXPOSED PAD MUST BECONNECTED TO RF AND DC GROUND. 17307- Figure 2. Pin Configuration Table 8. Pin Function Descriptions Pin No.Mnemonic Description 1, 3, 5, 8, 9, 16, 17, GND Ground. Solder the GND pins to a low impedance ground plane. 20, 22, 24, 25, 32 2 VGG2 Gain Control. VGG2 is dc-coupled and accomplishes gain control by reducing the internal voltage and becoming more negative. Attach bypass capacitors to VGG2, as shown in Figure 38. Under normal operating conditions, VGG2 is left open. 4 RFIN RF Input. RFIN is ac-coupled and matched to 50 Ω. 6, 7, 10 to 15, 18, NIC No Internal Connection. Solder the NIC pins to a low impedance ground plane. 19, 23, 26 to 30 21 RFOUT RF Output. RFOUT is ac-coupled and matched to 50 Ω. 31 VDD Power Supply Voltage for the Amplifier. EPAD Exposed Pad. The exposed pad must be connected to RF and dc ground. INTERFACE SCHEMATICSRFOUT 003 006 RFIN 17307- 17307- Figure 3. RFIN Interface Schematic Figure 6. RFOUT Interface Schematic GND 007 V 17307- GG2 Figure 7. GND Interface Schematic 004 17307- Figure 4. VGG2 Interface Schematic VDD 005 17307- Figure 5. VDD Interface Schematic Rev. 0 | Page 6 of 14 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications 2 GHz to 6 GHz 6 GHz to 20 GHz 20 GHz to 28 GHz DC Specifications Absolute Maximum Ratings Electrostatic Discharge (ESD) Ratings ESD Ratings for ADL9006 ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Theory of Operation Applications Information Biasing Procedures Outline Dimensions Ordering Guide