Datasheet AD744 (Analog Devices) - 2

AD744–SPECIFICATIONS (@ +25
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C and
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15 V dc, unless otherwise noted) AD744J/A/S AD744K/B/T Model Conditions Min Typ Max Min Typ Max Unit
INPUT OFFSET VOLTAGE1 Initial Offset 0.3 1.0 0.25 0.5 mV Offset TMIN to TMAX 2 1.0 mV vs. Temp. 5 20 5 10 µV/°C vs. Supply2 82 95 88 100 dB vs. Supply TMIN to TMAX 82 88 dB Long-Term Stability 15 15 µV/month INPUT BIAS CURRENT3 Either Input VCM = 0 V 30 100 30 100 pA Either Input @ TMAX = VCM = 0 V J, K 70°C 0.7 2.3 0.7 2.3 nA A, B, C 85°C 1.9 6.4 1.9 6.4 nA S, T 125°C 31 102 31 102 nA Either Input VCM = +10 V 40 150 40 150 pA Offset Current VCM = 0 V 20 50 10 50 pA Offset Current @ TMAX = VCM = 0 V J, K 70°C 0.4 1.1 0.2 1.1 nA A, B, C 85°C 1.3 3.2 0.6 3.2 nA S, T 125°C 20 52 10 52 nA FREQUENCY RESPONSE Gain BW, Small Signal G = –1 8 13 9 13 MHz Full Power Response VO = 20 V p-p 1.2 1.2 MHz Slew Rate, Unity Gain G = –1 45 75 50 75 V/µs Settling Time to 0.01%4 G = –1 0.5 0.75 0.5 0.75 µs Total Harmonic f = 1 kHz Distortion R1 ≥ 2 kΩ VO = 3 V rms 0.0003 0.0003 % INPUT IMPEDANCE Differential 3 ⫻ 1012||5.5 3 ⫻ 1012||5.5 Ω||pF Common Mode 3 ⫻ 1012||5.5 3 ⫻ 1012||5.5 Ω||pF INPUT VOLTAGE RANGE Differential5 ± 20 ± 20 V Common-Mode Voltage +14.5, –11.5 +14.5, –11.5 V Over Max Operating Range6 –11 +13 –11 +13 V Common-Mode Rejection Ratio VCM = ± 10 V 78 88 82 88 dB TMIN to TMAX 76 84 80 84 dB VCM = ± 11 V 72 84 78 84 dB TMIN to TMAX 70 80 74 80 dB INPUT VOLTAGE NOISE 0.1 to 10 Hz 2 2 µV p-p f = 10 Hz 45 45 nV/√Hz f = 100 Hz 22 22 nV/√Hz f = 1 kHz 18 18 nV/√Hz f = 10 kHz 16 16 nV/√Hz INPUT CURRENT NOISE f = 1 kHz 0.01 0.01 pA/√Hz OPEN LOOP GAIN7 VO = ± 10 V RLOAD ≥ 2 kΩ 200 400 250 400 V/mV TMIN to TMAX 100 100 V/mV OUTPUT CHARACTERISTICS Voltage RLOAD ≥ 2 kΩ
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13, –12.5 +13.9, –13.3 +13, –12.5 +13.9, –13.3 V T ± MIN to TMAX 12 +13.8, –13.1 ± 12 +13.8, –13.1 V Current Short Circuit 25 25 mA Capacitive Load8 Gain = –1 1000 1000 pF POWER SUPPLY Rated Performance ± 15 ± 15 V Operating Range ± 4.5 ± 18 ± 4.5 ± 18 V Quiescent Current 3.5 5.0 3.5 4.0 mA NOTES 1Input offset voltage specifications are guaranteed after 5 minutes of operation at TA = +25°C. 2PSRR test conditions: +VS = 15 V, –VS = –12 V to –18 V and +VS = +12 V to +18 V, –VS = –15 V. 3Bias Current Specifications are guaranteed maximum at either input after 5 minutes of operation at TA = +25°C. For higher temperature, the current doubles every 10°C. 4Gain = –1, RL = 2 k, CL = 10 pF, refer to Figure 25. 5Defined as voltage between inputs, such that neither exceeds ±10 V from ground. 6Typically exceeding –14.1 V negative common-mode voltage on either input results in an output phase reversal. 7Open-Loop Gain is specified with VOS both nulled and unnulled. 8Capacitive load drive specified for CCOMP = 20 pF with the device connected as shown in Figure 32. Under these conditions, slew rate = 14 V/µs and 0.01% settling time = 1.5 µs typical. Refer to Table II for optimum compensation while driving a capacitive load. Specifications subject to change without notice. All min and max specifications are guaranteed. –2– REV. D Document Outline FEATURES ac Performance dc Performance APPLICATIONS CONNECTION DIAGRAMS PRODUCT DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS METALIZATION PHOTOGRAPH TYPICAL CHARACTERISITICS POWER SUPPLY BYPASSING MEASURING AD744 SETTLING TIME EXTERNAL FREQUENCY COMPENSATION Using Decompensation to Extend the Gain Bandwidth Product HIGH-SPEED OP AMP APPLICATIONS TECHNIQUES DAC Buffers (I-to-V Converters) A HIGH-SPEED, 3 OP AMP INSTRUMENTATION AMPLIFIER CIRCUIT Minimizing Settling Time in Real-World Applications OUTLINE DIMENSIONS ORDERING GUIDE REVISION HISTORY