Datasheet LT3960 (Analog Devices) - 10
| Hersteller | Analog Devices |
| Beschreibung | I2C to CAN-Physical Transceiver |
| Seiten / Seite | 20 / 10 — TIMING DIAGRAMS. Figure 3. Transceiver Data Propagation Timing Diagram. … |
| Dateiformat / Größe | PDF / 1.1 Mb |
| Dokumentensprache | Englisch |
TIMING DIAGRAMS. Figure 3. Transceiver Data Propagation Timing Diagram. Figure 4. I2CAN Dominant Timeout
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LT3960
TIMING DIAGRAMS
HIGH SCL (MASTER) 0.7VDD 0.3VDD LOW CANSCLH HIGH SCL (MASTER) 0.3VDD LOW CANSCLL CANSCLH DOMINANT V CANSCLL OD 0.9V 0.5V RECESSIVE DOMINANT HIGH V SCL (SLAVE) 0.7V OD 0.9V 0.3V DD DD 0.5V LOW RECESSIVE tPI2CBD tPI2CBR t t TO;CAN 3960 F04 3960 F03 PBI2CD tPBI2CR
Figure 3. Transceiver Data Propagation Timing Diagram Figure 4. I2CAN Dominant Timeout
1.2V (SLAVE MODE) 2.5V (MASTER MODE) EN 0.75V 0.7V EN 0.75V 0.7V SCL OR SDA 0.7VCC 0.3V SCL OR SDA DD 0.3VDD tEN;I2C tSHDN;I2C tEN;CAN tSHDN;CAN CANxH CANxH CAN CANxL CANxL V 0.9V OD 0.9V VOD 0.5V 0.5V 3960 F05 3960 F06
Figure 5. I2CAN Enable and Disable Times Figure 6. I2CAN Enable and Disable Times
Rev. 0 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Switching Characteristics Typical Performance Characteristics Pin Functions Block Diagram Test Circuits Timing Diagrams Operation Applications Information Typical Applications Typical Application Related Parts
TIMING DIAGRAMS
HIGH SCL (MASTER) 0.7VDD 0.3VDD LOW CANSCLH HIGH SCL (MASTER) 0.3VDD LOW CANSCLL CANSCLH DOMINANT V CANSCLL OD 0.9V 0.5V RECESSIVE DOMINANT HIGH V SCL (SLAVE) 0.7V OD 0.9V 0.3V DD DD 0.5V LOW RECESSIVE tPI2CBD tPI2CBR t t TO;CAN 3960 F04 3960 F03 PBI2CD tPBI2CR
Figure 3. Transceiver Data Propagation Timing Diagram Figure 4. I2CAN Dominant Timeout
1.2V (SLAVE MODE) 2.5V (MASTER MODE) EN 0.75V 0.7V EN 0.75V 0.7V SCL OR SDA 0.7VCC 0.3V SCL OR SDA DD 0.3VDD tEN;I2C tSHDN;I2C tEN;CAN tSHDN;CAN CANxH CANxH CAN CANxL CANxL V 0.9V OD 0.9V VOD 0.5V 0.5V 3960 F05 3960 F06
Figure 5. I2CAN Enable and Disable Times Figure 6. I2CAN Enable and Disable Times
Rev. 0 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Switching Characteristics Typical Performance Characteristics Pin Functions Block Diagram Test Circuits Timing Diagrams Operation Applications Information Typical Applications Typical Application Related Parts