Datasheet MASTERGAN2 (STMicroelectronics) - 2
| Hersteller | STMicroelectronics |
| Beschreibung | High power density 600V Half bridge driver with two enhancement mode GaN HEMT |
| Seiten / Seite | 29 / 2 — MASTERGAN2. Block diagram. Figure 1. MASTERGAN2 block diagram. DS13597. … |
| Dateiformat / Größe | PDF / 1.6 Mb |
| Dokumentensprache | Englisch |
MASTERGAN2. Block diagram. Figure 1. MASTERGAN2 block diagram. DS13597. Rev 1. page 2/29
Modelllinie für dieses Datenblatt
Textversion des Dokuments
MASTERGAN2 Block diagram 1 Block diagram Figure 1. MASTERGAN2 block diagram
BOOT OUTb GH VS VCC VCC UVLO Vbo HON RGONH UVLO HIN Driver Level Shifter HOFF RGOFFH LIN OUT Logic, interlocking, overtemp SD/OD LON RGONL Level Shifter Driver LOFF RGOFFL GND RBLEED PVCC PGND GL SENSE
DS13597
-
Rev 1 page 2/29
Document Outline Features Application Description 1 Block diagram 2 Pin description and connection diagram 2.1 Pin list 3 Electrical Data 3.1 Absolute maximum ratings 3.2 Recommended operating conditions 3.3 Thermal data 4 Electrical characteristics 4.1 Driver 4.2 GaN power transistor 5 Device characterization values 6 Functional description 6.1 Logic inputs 6.2 Bootstrap structure 6.3 VCC supply pins and UVLO function 6.4 VBO UVLO protection 6.5 Thermal shutdown 7 Typical application diagrams 8 Package information 8.1 QFN 9 x 9 x 1 mm, 31 leads, pitch 0.6 mm package information 9 Suggested footprint 10 Ordering information Revision history Contents List of tables List of figures
BOOT OUTb GH VS VCC VCC UVLO Vbo HON RGONH UVLO HIN Driver Level Shifter HOFF RGOFFH LIN OUT Logic, interlocking, overtemp SD/OD LON RGONL Level Shifter Driver LOFF RGOFFL GND RBLEED PVCC PGND GL SENSE
DS13597
-
Rev 1 page 2/29
Document Outline Features Application Description 1 Block diagram 2 Pin description and connection diagram 2.1 Pin list 3 Electrical Data 3.1 Absolute maximum ratings 3.2 Recommended operating conditions 3.3 Thermal data 4 Electrical characteristics 4.1 Driver 4.2 GaN power transistor 5 Device characterization values 6 Functional description 6.1 Logic inputs 6.2 Bootstrap structure 6.3 VCC supply pins and UVLO function 6.4 VBO UVLO protection 6.5 Thermal shutdown 7 Typical application diagrams 8 Package information 8.1 QFN 9 x 9 x 1 mm, 31 leads, pitch 0.6 mm package information 9 Suggested footprint 10 Ordering information Revision history Contents List of tables List of figures