Datasheet SAM9X60 SIP (Microchip) - 3
| Hersteller | Microchip |
| Beschreibung | SAM9X60 System-In-Package (SIP) MPU with up to 1 Gbit DDR2 SDRAM and up to 64 Mbits SDR-SDRAM |
| Seiten / Seite | 40 / 3 — SAM9X60 SIP. Datasheet |
| Dateiformat / Größe | PDF / 770 Kb |
| Dokumentensprache | Englisch |
SAM9X60 SIP. Datasheet
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SAM9X60 SIP
– Thirteen FLEXCOMs (USART, SPI and TWI) – One 12-channel 12-bit Analog-to-Digital Converter with 4/5 wires resistive touchscreen support • Hardware Cryptography – SHA (SHA1, SHA224, SHA256, SHA384, SHA512): compliant with FIPS PUB 180-2 – AES: 256-, 192-, 128-bit key algorithm, compliant with FIPS PUB 197 – TDES: two-key or three-key algorithms, compliant with FIPS PUB 46-3 – True Random Number Generator (TRNG) compliant with NIST Special Publication 800-22 Test Suite and FIPS PUBs 140-2 and 140-3 • I/O Ports – Four 32-bit Parallel Input/Output Controllers – Up to 112 programmable I/O Lines multiplexed with up to three peripheral I/Os – Input change interrupt capability on each I/O line, optional Schmitt trigger input – Individually programmable open-drain, pull-up and pull-down resistor, synchronous output – General-purpose analog and digital inputs tolerant to positive and negative current injection • Package – DDR2-SDRAM variant: 233-ball BGA, 14x14 mm², 0.8 mm pitch, optimized for standard class PCB layout (down to 2 layers) – SDR-SDRAM variant: 196-ball BGA, 11x11 mm², 0.65 mm pitch, optimized for standard class PCB layout (down to 4 layers) • Design for Low Electromagnetic Interference (EMI) – Slew rate controlled I/Os – DDR/SDR Phy with impedance-calibrated drivers – Spread spectrum PLLs – Careful BGA power/ground ball assignment to provide optimum decoupling capacitors placement • Operating Conditions – Ambient temperature range (TA): -40°C to +85°C – Junction temperature range (TJ) : -40°C to +125°C © 2020 Microchip Technology Inc.
Datasheet
DS60001580B-page 3 Document Outline Scope Introduction Reference Documents Features Table of Contents 1. DDR2-SDRAM Features 2. SDR-SDRAM Features 3. Configuration Summary 4. Block Diagram 5. Chip Identifier 6. Package and Ballout 6.1. Packages 6.2. Ballout 7. Memories 8. Electrical Characteristics 8.1. Decoupling 8.2. Power Sequences 9. Mechanical Characteristics 9.1. 233-Ball TFBGA 9.2. 196-Ball TFBGA 10. Ordering Information 11. Revision History 11.1. DS60001580B - 02/2020 11.2. DS60001580A - 10/2019 The Microchip Website Product Change Notification Service Customer Support Product Identification System Microchip Devices Code Protection Feature Legal Notice Trademarks Quality Management System Worldwide Sales and Service
– Thirteen FLEXCOMs (USART, SPI and TWI) – One 12-channel 12-bit Analog-to-Digital Converter with 4/5 wires resistive touchscreen support • Hardware Cryptography – SHA (SHA1, SHA224, SHA256, SHA384, SHA512): compliant with FIPS PUB 180-2 – AES: 256-, 192-, 128-bit key algorithm, compliant with FIPS PUB 197 – TDES: two-key or three-key algorithms, compliant with FIPS PUB 46-3 – True Random Number Generator (TRNG) compliant with NIST Special Publication 800-22 Test Suite and FIPS PUBs 140-2 and 140-3 • I/O Ports – Four 32-bit Parallel Input/Output Controllers – Up to 112 programmable I/O Lines multiplexed with up to three peripheral I/Os – Input change interrupt capability on each I/O line, optional Schmitt trigger input – Individually programmable open-drain, pull-up and pull-down resistor, synchronous output – General-purpose analog and digital inputs tolerant to positive and negative current injection • Package – DDR2-SDRAM variant: 233-ball BGA, 14x14 mm², 0.8 mm pitch, optimized for standard class PCB layout (down to 2 layers) – SDR-SDRAM variant: 196-ball BGA, 11x11 mm², 0.65 mm pitch, optimized for standard class PCB layout (down to 4 layers) • Design for Low Electromagnetic Interference (EMI) – Slew rate controlled I/Os – DDR/SDR Phy with impedance-calibrated drivers – Spread spectrum PLLs – Careful BGA power/ground ball assignment to provide optimum decoupling capacitors placement • Operating Conditions – Ambient temperature range (TA): -40°C to +85°C – Junction temperature range (TJ) : -40°C to +125°C © 2020 Microchip Technology Inc.
Datasheet
DS60001580B-page 3 Document Outline Scope Introduction Reference Documents Features Table of Contents 1. DDR2-SDRAM Features 2. SDR-SDRAM Features 3. Configuration Summary 4. Block Diagram 5. Chip Identifier 6. Package and Ballout 6.1. Packages 6.2. Ballout 7. Memories 8. Electrical Characteristics 8.1. Decoupling 8.2. Power Sequences 9. Mechanical Characteristics 9.1. 233-Ball TFBGA 9.2. 196-Ball TFBGA 10. Ordering Information 11. Revision History 11.1. DS60001580B - 02/2020 11.2. DS60001580A - 10/2019 The Microchip Website Product Change Notification Service Customer Support Product Identification System Microchip Devices Code Protection Feature Legal Notice Trademarks Quality Management System Worldwide Sales and Service