Datasheet PIC18F24/25K42 (Microchip) - 2

PIC18F24/25K42 Digital Peripherals
• Two I2C Modules, SMBus, PMBus™ Compatible: - Supports Standard-mode (100 kHz), Fast- • Three 8-Bit Timers (TMR2/4/6) with Hardware mode (400 kHz) and Fast-mode plus (1 MHz) Limit Timer (HLT): modes of operation - Hardware monitoring and Fault detection - Dedicated address, transmit and receive • Four 16-Bit Timers (TMR0/1/3/5) buffers • Four Configurable Logic Cel (CLC): - Bus collision detection with arbitration - Integrated combinational and sequential logic - Bus time-out detection and handling • Three Complementary Waveform Generators - Multi-Master mode (CWGs): - Separate transmit and receive buffers with 2- - Rising and falling edge dead-band control byte FIFO and DMA capabilities - Full-bridge, half-bridge, 1-channel drive - I2C, SMBus 2.0 and SMBus 3.0, and 1.8V - Multiple signal sources input level selections - Programmable dead band • Device I/O Port Features: - Fault-shutdown input - 24 I/O pins • Four Capture/Compare/PWM (CCP) Modules - One input-only pin (RE3) • Four 10-Bit Pulse-Width Modulators (PWMs) - Individually programmable I/O direction, • Numerically Controlled Oscil ator (NCO): open-drain, slew rate, weak pull-up control - Generates true linear frequency control - Interrupt-on-change (on up to 25 I/O pins) - High resolution using 20-bit accumulator and - Three external interrupt pins 20-bit increment values • Peripheral Pin Select (PPS): • DSM: Data Signal Modulator: - Enables pin mapping of digital I/O - Multiplex two carrier clocks, with glitch • Signal Measurement Timer (SMT): prevention feature - 24-bit timer/counter with prescaler - Multiple sources for each carrier • Programmable CRC with Memory Scan: - Reliable data/program memory monitoring for fail-safe operation (e.g., Class B) - Calculate CRC over any portion of program memory or data EEPROM • Two UART Modules: - Modules are asynchronous and compatible with RS-232 and RS-485 - One of the UART modules supports LIN master and slave, DMX-512 mode, DALI gear and device protocols - Automatic and user-timed BREAK period generation - DMA compatible - Automatic checksums - Programmable 1, 1.5, and 2 Stop bits - Wake-up on BREAK reception • One SPI Module: - Configurable length bytes - Configurable length data packets - Receive-without-transmit option - Transmit-without-receive option - Transfer byte counter - Separate transmit and receive buffers with 2- byte FIFO and DMA capabilities  2020 Microchip Technology Inc. DS40002113A-page 2 Document Outline Description Family Types Table of Contents 1.0 Device Overview 2.0 Electrical Characteristics TABLE 2-1: Supply Voltage (High Temperature) FIGURE 2-1: Voltage-Frequency Graph, -40°C £ Ta £ +150°C TABLE 2-2: DC Characteristics: Supply Current (Idd)(1,2) TABLE 2-3: DC Characteristics: Power-Down Currents (Ipd)(1,2,3) TABLE 2-4: Memory Specifications (150°C) TABLE 2-5: Internal Oscillator Parameters(1) FIGURE 3-2: Precision-Calibrated HFINTOSC Frequency Accuracy Over Device Vdd and Temperature TABLE 2-6: Reset, Watchdog Timer, Oscillator Start-up Timer, Power-up Timer, Brown-out Timer and Low-Power Brown-out Reset Specifications TABLE 2-7: High/Low-Voltage Detect Characteristics TABLE 2-8: Fixed Voltage Reference (FVR) Specifications Appendix A: Revision History Product ID System Trademarks Worldwide Sales