Datasheet MAX4400, MAX4401, MAX4402, MAX4403 (Maxim) - 5
| Hersteller | Maxim |
| Beschreibung | Single/Dual/Quad, Low-Cost, Single-Supply, Rail-to-Rail Op Amps with Shutdown |
| Seiten / Seite | 13 / 5 — Electrical Characteristics. TA = +25°C. PARAMETER. SYMBOL. CONDITIONS. … |
| Dateiformat / Größe | PDF / 2.4 Mb |
| Dokumentensprache | Englisch |
Electrical Characteristics. TA = +25°C. PARAMETER. SYMBOL. CONDITIONS. MIN. TYP. MAX. UNITS
Modelllinie für dieses Datenblatt
- MAX4400AUK MAX4400AUK+ MAX4400AUK+C5K MAX4400AUK+T MAX4400AUK-T MAX4400AXK MAX4400AXK+ MAX4400AXK+T MAX4400AXK+T10 MAX4400AXK+TG05 MAX4400AXK+TG24 MAX4400AXK-T
- MAX4401AXT MAX4401AXT+ MAX4401AXT+T MAX4401AXT+TG05 MAX4401AXT+TG126 MAX4401AXT+TG24 MAX4401AXT+TG50 MAX4401AXT-T MAX4401AXT-TG070
Textversion des Dokuments
MAX4400–MAX4403 Single/Dual/Quad, Low-Cost, Single-Supply, Rail-to-Rail Op Amps with Shutdown
Electrical Characteristics
(VDD = +5V, VSS = 0V, VCM = 0V, VOUT = VDD/2, RL = ∞ connected to VDD/2, SHDN = VDD (MAX4401 only),
TA = +25°C
, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply Voltage Range VDD Inferred from PSRR test 2.5 55 V V Supply Current per Amplifier I DD = 2.5V 320 DD µA VDD = 5.0V 410 700 Supply Current in Shutdown ISHDN SHDN = VSS (Note 1) 0.00002 1 µA MAX4400/MAX4401 ±0.8 ±4.5 Input Offset Voltage VOS mV MAX4402/MAX4403 ±1.0 ±5.5 Input Bias Current IB (Note 2) ±0.1 ±100 pA Input Offset Current IOS (Note 2) ±0.1 ±100 pA Input Resistance RIN Differential or common mode 1000 GΩ Input Common-Mode Voltage V Range CM Inferred from CMRR test VSS VDD - 1.4 V Common-Mode Rejection Ratio CMRR VSS ≤ VCM ≤ VDD - 1.4V 68 84 dB Power-Supply Rejection Ratio PSRR 2.5V ≤ VDD ≤ 5.5V 78 100 dB V R Large-Signal Voltage Gain A SS + 0.3V ≤ L = 100kΩ 120 VOL dB VOUT ≤ VDD - 0.3V RL = 2kΩ 90 110 Specified as R Output Voltage High V L = 100kΩ 3 OH mV |VDD - VOH| RL = 2kΩ 55 200 Specified as R Output Voltage Low V L = 100kΩ 2 OL mV |VSS - VOL| RL = 2kΩ 30 75 Sourcing 12 Output Short-Circuit Current mA Sinking 30 Device in shutdown mode, SHDN = SS, Shutdown Mode Output Leakage IOUTSHDN ±1.0 µA VSS < VOUT < VCC (Note 1) SHDN Logic-Low VIL (Note 1) 0.3 × VDD V SHDN Logic-High VIH (Note 1) 0.7 × VDD V SHDN Input Current IIL, IIH SHDN = VDD or VSS (Note 1) ±0.001 ±500 nA Gain-Bandwidth Product GBW 800 kHz Phase Margin fM 70 ° Gain Margin 20 dB Slew Rate SR 1 V/µs Input Voltage-Noise Density en f = 10kHz 36 nV/√Hz Input Current-Noise Density in f = 10kHz 1 fA/√Hz Capacitive-Load Stability CLOAD AV = +1V/V 400 pF Shutdown Delay Time tSHDN AV = +1V/V 0.4 μs Enable Delay Time tEN (Note 1) 6 μs Power-On Time tON 5 μs Input Capacitance CIN 2.5 pF R Total Harmonic Distortion THD f = 10kHz, VOUT = L = 100kΩ 0.009 2V % P-P, AV = +1V/V RL = 2kΩ 0.015 Settling Time to 0.1% tS VOUT = 2V step 7 μs www.maximintegrated.com Maxim Integrated │ 5
Electrical Characteristics
(VDD = +5V, VSS = 0V, VCM = 0V, VOUT = VDD/2, RL = ∞ connected to VDD/2, SHDN = VDD (MAX4401 only),
TA = +25°C
, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply Voltage Range VDD Inferred from PSRR test 2.5 55 V V Supply Current per Amplifier I DD = 2.5V 320 DD µA VDD = 5.0V 410 700 Supply Current in Shutdown ISHDN SHDN = VSS (Note 1) 0.00002 1 µA MAX4400/MAX4401 ±0.8 ±4.5 Input Offset Voltage VOS mV MAX4402/MAX4403 ±1.0 ±5.5 Input Bias Current IB (Note 2) ±0.1 ±100 pA Input Offset Current IOS (Note 2) ±0.1 ±100 pA Input Resistance RIN Differential or common mode 1000 GΩ Input Common-Mode Voltage V Range CM Inferred from CMRR test VSS VDD - 1.4 V Common-Mode Rejection Ratio CMRR VSS ≤ VCM ≤ VDD - 1.4V 68 84 dB Power-Supply Rejection Ratio PSRR 2.5V ≤ VDD ≤ 5.5V 78 100 dB V R Large-Signal Voltage Gain A SS + 0.3V ≤ L = 100kΩ 120 VOL dB VOUT ≤ VDD - 0.3V RL = 2kΩ 90 110 Specified as R Output Voltage High V L = 100kΩ 3 OH mV |VDD - VOH| RL = 2kΩ 55 200 Specified as R Output Voltage Low V L = 100kΩ 2 OL mV |VSS - VOL| RL = 2kΩ 30 75 Sourcing 12 Output Short-Circuit Current mA Sinking 30 Device in shutdown mode, SHDN = SS, Shutdown Mode Output Leakage IOUTSHDN ±1.0 µA VSS < VOUT < VCC (Note 1) SHDN Logic-Low VIL (Note 1) 0.3 × VDD V SHDN Logic-High VIH (Note 1) 0.7 × VDD V SHDN Input Current IIL, IIH SHDN = VDD or VSS (Note 1) ±0.001 ±500 nA Gain-Bandwidth Product GBW 800 kHz Phase Margin fM 70 ° Gain Margin 20 dB Slew Rate SR 1 V/µs Input Voltage-Noise Density en f = 10kHz 36 nV/√Hz Input Current-Noise Density in f = 10kHz 1 fA/√Hz Capacitive-Load Stability CLOAD AV = +1V/V 400 pF Shutdown Delay Time tSHDN AV = +1V/V 0.4 μs Enable Delay Time tEN (Note 1) 6 μs Power-On Time tON 5 μs Input Capacitance CIN 2.5 pF R Total Harmonic Distortion THD f = 10kHz, VOUT = L = 100kΩ 0.009 2V % P-P, AV = +1V/V RL = 2kΩ 0.015 Settling Time to 0.1% tS VOUT = 2V step 7 μs www.maximintegrated.com Maxim Integrated │ 5