Datasheet LTC7852 (Analog Devices) - 8
| Hersteller | Analog Devices |
| Beschreibung | Dual Output, 6-Phase, Multiphase Current Mode Synchronous Controller with Current Monitoring |
| Seiten / Seite | 32 / 8 — PIN FUNCTIONS (GQFN/QFN, LTC7852/LTC7852-1) V1P5 (Pin 18, LTC7852 Only):. … |
| Revision | A |
| Dateiformat / Größe | PDF / 1.4 Mb |
| Dokumentensprache | Englisch |
PIN FUNCTIONS (GQFN/QFN, LTC7852/LTC7852-1) V1P5 (Pin 18, LTC7852 Only):. PGOOD1, PGOOD2 (Pins 29, 10/Pins 23, 6):
Modelllinie für dieses Datenblatt
Textversion des Dokuments
LTC7852/LTC7852-1
PIN FUNCTIONS (GQFN/QFN, LTC7852/LTC7852-1) V1P5 (Pin 18, LTC7852 Only):
Internally Generated 1.5V
PGOOD1, PGOOD2 (Pins 29, 10/Pins 23, 6):
Power Good Voltage Regulator Output Pin. Bypass this pin to SGND Indicator Outputs. Open drain output that pulls to ground with a low ESR 2.2µF capacitor. when output voltage is not in regulation.
IMON1, IMON2 (Pins 19, 17, LTC7852 Only):
Output
SNSN1, SNSN2, SNSN3, SNSN4, SNSN5, SNSN6 (Pins
Current Monitors. The differential voltage between each
30, 33, 36, 3, 6, 9, LTC7852 Only):
Second Negative IMON pin and the V1P5 pin provides a linear indication of Current Sense Comparator Inputs. This input senses the output current from the corresponding channel. signal from the output inductor’s DCR with a filter band-
V
width of five times the inductor’s L/DCR value when low
CC (Pin 20/Pin 13):
External 5V Input. The control circuits are powered from this voltage. Bypass this pin to GND DCR current sensing is enabled. with a capacitor (0.1μF to 1μF ceramic) in close proximity
SNSP1, SNSP2, SNSP3, SNSP4, SNSP5, SNSP6 (Pins
to the chip.
31, 34, 37, 2, 5, 8 /Pins 24, 26, 27, 3, 4, 5):
Positive
PHCFG (Pin 21/Pin 14):
Phase Configuration Pin. This Current Sense Comparator Inputs. pin selects the phases powering output 1 and output 2.
SNSAVG1, SNSAVG2, SNSAVG3, SNSAVG4, SNSAVG5, FREQ (Pin 22/Pin 15):
Frequency Set/Select Pin. A resistor
SNSAVG6 (Pins 32, 35, 38, 1, 4, 7, LTC7852 Only):
First between this pin and SGND sets the switching frequency. Negative Current Sense Comparator Inputs. This input This pin sources 20µA. senses the signal from the output inductor’s DCR with a filter which has a bandwidth at 3/5 of the inductor’s
ILIM1, ILIM2 (Pins 23, 16/Pins 16, 12):
Current Compara- L/DCR value. Tie to VCC for DCR sensing with DCR >1mΩ tor Sense Voltage Limit Selection Pin. or DrMOS current sensing.
RUN1, RUN2 (Pins 24, 15/Pins 17, 11):
Enable Control
SNSN (Pins 2, 25, LTC7852-1 Only):
Internal 1.5V Voltage Inputs. A voltage above 1.22V turns on the IC. There is a Regulator Output. 1µA pull-up current on this pin. Once the RUN pin rises above the 1.22V threshold, the pull-up increases to 7.7µA.
VDD (Pin 39/Pin 28):
Internally Generated 3.3V Power Sup- ply Output Pin. Bypass this pin to SGND with a low ESR
V + + OSNS1 , VOSNS2 (Pins 25, 14/Pins 19, 10):
Remote Sense 2.2µF capacitor. Do not load this pin with external current. Differential Amplifier Non-Inverting inputs. Connect to feed- back divider center tap with the divider across the output
CLKOUT (Pin 40/Pin 29):
Clock Output Pin. load. The remote sense differential amplifier’s output is
PWM1, PWM2, PWM3, PMW4, PWM5, PWM6 (Pins 41,
internally connected to the error amplifier’s inverting input.
42, 43, 44, 45, 46/Pins 30, 31, 32, 33, 34, 35):
(Top) Gate
V – –
Signal Outputs. This signal goes to the PWM or top gate
OSNS1 , VOSNS2 (Pins 26, 13/Pins 20, 9):
Remote Sense Differential Amplifier Inverting Inputs. Connect to sense input of the external gate driver or integrated driver MOSFET ground at the output load. or Power Block. This is a three-state compatible output.
ITH1, ITH2 (Pins 27, 12/Pins 21, 8):
Current Control
PLLIN (Pin 47/Pin 1):
External Synchronization Input to Thresholds and Error Amplifier Compensation Points. Phase Detector Pin. A clock on the pin will synchronize The current comparator’s threshold increases with the the internal oscillator with the clock on this pin. The PLL ITH control voltage. compensation network is integrated into the IC.
SS1, SS2 (Pins 28, 11/Pins 22, 7):
Soft-Start Inputs. The
GND (Pin 48/Pin 36):
Ground. All small-signal components voltage ramp rate at this pin sets the voltage ramp rate and compensation components should be connected here. of the output. A capacitor to ground programs soft-start. The exposed pad must be soldered to the PCB for rated This pin has a 5µA pull-up current. The minimum required thermal performance. soft-start capacitor is 22nF.
Exposed pad (Pin 49/Pin 37):
Ground. Rev A 8 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagrams Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS (GQFN/QFN, LTC7852/LTC7852-1) V1P5 (Pin 18, LTC7852 Only):
Internally Generated 1.5V
PGOOD1, PGOOD2 (Pins 29, 10/Pins 23, 6):
Power Good Voltage Regulator Output Pin. Bypass this pin to SGND Indicator Outputs. Open drain output that pulls to ground with a low ESR 2.2µF capacitor. when output voltage is not in regulation.
IMON1, IMON2 (Pins 19, 17, LTC7852 Only):
Output
SNSN1, SNSN2, SNSN3, SNSN4, SNSN5, SNSN6 (Pins
Current Monitors. The differential voltage between each
30, 33, 36, 3, 6, 9, LTC7852 Only):
Second Negative IMON pin and the V1P5 pin provides a linear indication of Current Sense Comparator Inputs. This input senses the output current from the corresponding channel. signal from the output inductor’s DCR with a filter band-
V
width of five times the inductor’s L/DCR value when low
CC (Pin 20/Pin 13):
External 5V Input. The control circuits are powered from this voltage. Bypass this pin to GND DCR current sensing is enabled. with a capacitor (0.1μF to 1μF ceramic) in close proximity
SNSP1, SNSP2, SNSP3, SNSP4, SNSP5, SNSP6 (Pins
to the chip.
31, 34, 37, 2, 5, 8 /Pins 24, 26, 27, 3, 4, 5):
Positive
PHCFG (Pin 21/Pin 14):
Phase Configuration Pin. This Current Sense Comparator Inputs. pin selects the phases powering output 1 and output 2.
SNSAVG1, SNSAVG2, SNSAVG3, SNSAVG4, SNSAVG5, FREQ (Pin 22/Pin 15):
Frequency Set/Select Pin. A resistor
SNSAVG6 (Pins 32, 35, 38, 1, 4, 7, LTC7852 Only):
First between this pin and SGND sets the switching frequency. Negative Current Sense Comparator Inputs. This input This pin sources 20µA. senses the signal from the output inductor’s DCR with a filter which has a bandwidth at 3/5 of the inductor’s
ILIM1, ILIM2 (Pins 23, 16/Pins 16, 12):
Current Compara- L/DCR value. Tie to VCC for DCR sensing with DCR >1mΩ tor Sense Voltage Limit Selection Pin. or DrMOS current sensing.
RUN1, RUN2 (Pins 24, 15/Pins 17, 11):
Enable Control
SNSN (Pins 2, 25, LTC7852-1 Only):
Internal 1.5V Voltage Inputs. A voltage above 1.22V turns on the IC. There is a Regulator Output. 1µA pull-up current on this pin. Once the RUN pin rises above the 1.22V threshold, the pull-up increases to 7.7µA.
VDD (Pin 39/Pin 28):
Internally Generated 3.3V Power Sup- ply Output Pin. Bypass this pin to SGND with a low ESR
V + + OSNS1 , VOSNS2 (Pins 25, 14/Pins 19, 10):
Remote Sense 2.2µF capacitor. Do not load this pin with external current. Differential Amplifier Non-Inverting inputs. Connect to feed- back divider center tap with the divider across the output
CLKOUT (Pin 40/Pin 29):
Clock Output Pin. load. The remote sense differential amplifier’s output is
PWM1, PWM2, PWM3, PMW4, PWM5, PWM6 (Pins 41,
internally connected to the error amplifier’s inverting input.
42, 43, 44, 45, 46/Pins 30, 31, 32, 33, 34, 35):
(Top) Gate
V – –
Signal Outputs. This signal goes to the PWM or top gate
OSNS1 , VOSNS2 (Pins 26, 13/Pins 20, 9):
Remote Sense Differential Amplifier Inverting Inputs. Connect to sense input of the external gate driver or integrated driver MOSFET ground at the output load. or Power Block. This is a three-state compatible output.
ITH1, ITH2 (Pins 27, 12/Pins 21, 8):
Current Control
PLLIN (Pin 47/Pin 1):
External Synchronization Input to Thresholds and Error Amplifier Compensation Points. Phase Detector Pin. A clock on the pin will synchronize The current comparator’s threshold increases with the the internal oscillator with the clock on this pin. The PLL ITH control voltage. compensation network is integrated into the IC.
SS1, SS2 (Pins 28, 11/Pins 22, 7):
Soft-Start Inputs. The
GND (Pin 48/Pin 36):
Ground. All small-signal components voltage ramp rate at this pin sets the voltage ramp rate and compensation components should be connected here. of the output. A capacitor to ground programs soft-start. The exposed pad must be soldered to the PCB for rated This pin has a 5µA pull-up current. The minimum required thermal performance. soft-start capacitor is 22nF.
Exposed pad (Pin 49/Pin 37):
Ground. Rev A 8 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagrams Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts