Datasheet OP77 (Analog Devices) - 3
| Hersteller | Analog Devices |
| Beschreibung | Next Generation OP07, Ultralow Offset Voltage Operational Amplifier |
| Seiten / Seite | 16 / 3 — Data Sheet. OP77. SPECIFICATIONS ELECTRICAL SPECIFICATIONS. Table 1. … |
| Revision | G |
| Dateiformat / Größe | PDF / 383 Kb |
| Dokumentensprache | Englisch |
Data Sheet. OP77. SPECIFICATIONS ELECTRICAL SPECIFICATIONS. Table 1. OP77E. OP77F. Parameter. Symbol. Conditions. Min. Typ. Max. Unit
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Data Sheet OP77 SPECIFICATIONS ELECTRICAL SPECIFICATIONS
@ VS = ±15 V, TA = 25°C, unless otherwise noted.
Table 1. OP77E OP77F Parameter Symbol Conditions Min Typ Max Min Typ Max Unit
INPUT OFFSET VOLTAGE VOS 10 25 20 60 μV LONG-TERM STABILITY1 VOS/time 0.3 0.4 μV/Mo INPUT OFFSET CURRENT IOS 0.3 1.5 0.3 2.8 nA INPUT BIAS CURRENT IB −0.2 +1.2 +2.0 −0.2 +1.2 +2.8 nA INPUT NOISE VOLTAGE2 enp-p 0.1 Hz to 10 Hz 0.35 0.6 0.38 0.65 μVp-p INPUT NOISE VOLTAGE DENSITY en fO = 10 Hz 10.3 18.0 10.5 20.0 nV/√Hz fO = 100 Hz2 10.0 13.0 10.2 13.5 fO = 1000 Hz 9.6 11.0 9.8 11.5 INPUT NOISE CURRENT2 inp-p 0.1 Hz to 10 Hz 14 30 15 35 pAp-p INPUT NOISE CURRENT DENSITY in fO = 10 Hz 0.32 0.80 0.35 0.90 pA√Hz fO = 100 Hz2 0.14 0.23 0.15 0.27 fO = 1000 Hz 0.12 0.17 0.13 0.18 INPUT RESISTANCE Differential Mode3 RIN 26 45 18.5 45 MΩ Common Mode RINCM 200 200 GΩ INPUT VOLTAGE RANGE IVR ±13 ±14 ±13 ±14 V COMMON-MODE REJECTION RATIO CMRR VCM = ±13 V 0.1 1.0 0.1 1.6 μV/V POWER SUPPLY REJECTION RATIO PSRR VS = ±3 V to ±18 V 0.7 3.0 0.7 3.0 μV/V LARGE-SIGNAL VOLTAGE GAIN AVO RL ≥ 2 kΩ 5000 12,000 2000 6000 V/mV VO = ±10 V OUTPUT VOLTAGE SWING VO RL ≥ 10 kΩ ±13.5 ±14.0 ±13.5 ±14.0 V RL ≥ 2 kΩ ±12.5 ±13.0 ±12.5 ±13.0 RL ≥ 1 kΩ ±12.0 ±12.5 ±12.0 ±12.5 SLEW RATE2 SR RL ≥ 2 kΩ 0.1 0.3 0.1 0.3 V/μs CLOSED-LOOP BANDWIDTH2 BW AVCL + 1 0.4 0.6 0.4 0.6 MHz OPEN-LOOP OUTPUT RESISTANCE RO 60 60 Ω POWER CONSUMPTION Pd VS = ±15 V, no load 50 60 50 60 mW VS = ±3 V, no load 3.5 4.5 3.5 4.5 OFFSET ADJUSTMENT RANGE Rp = 20 kn ±3 ±3 mV 1 Long-term input offset voltage stability refers to the averaged trend line of VOS vs. time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in VOS during the first 30 operating days are typically 2.5 μV. 2 Sample tested. 3 Guaranteed by design. Rev. G | Page 3 of 16 Document Outline Features Pin Connections General Description Table of Contents Revision History Specifications Electrical Specifications Wafer Test Limits Typical Electrical Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Typical Performance Characteristics Test Circuits Applications Precision Current Sinks Outline Dimensions Ordering Guide
Data Sheet OP77 SPECIFICATIONS ELECTRICAL SPECIFICATIONS
@ VS = ±15 V, TA = 25°C, unless otherwise noted.
Table 1. OP77E OP77F Parameter Symbol Conditions Min Typ Max Min Typ Max Unit
INPUT OFFSET VOLTAGE VOS 10 25 20 60 μV LONG-TERM STABILITY1 VOS/time 0.3 0.4 μV/Mo INPUT OFFSET CURRENT IOS 0.3 1.5 0.3 2.8 nA INPUT BIAS CURRENT IB −0.2 +1.2 +2.0 −0.2 +1.2 +2.8 nA INPUT NOISE VOLTAGE2 enp-p 0.1 Hz to 10 Hz 0.35 0.6 0.38 0.65 μVp-p INPUT NOISE VOLTAGE DENSITY en fO = 10 Hz 10.3 18.0 10.5 20.0 nV/√Hz fO = 100 Hz2 10.0 13.0 10.2 13.5 fO = 1000 Hz 9.6 11.0 9.8 11.5 INPUT NOISE CURRENT2 inp-p 0.1 Hz to 10 Hz 14 30 15 35 pAp-p INPUT NOISE CURRENT DENSITY in fO = 10 Hz 0.32 0.80 0.35 0.90 pA√Hz fO = 100 Hz2 0.14 0.23 0.15 0.27 fO = 1000 Hz 0.12 0.17 0.13 0.18 INPUT RESISTANCE Differential Mode3 RIN 26 45 18.5 45 MΩ Common Mode RINCM 200 200 GΩ INPUT VOLTAGE RANGE IVR ±13 ±14 ±13 ±14 V COMMON-MODE REJECTION RATIO CMRR VCM = ±13 V 0.1 1.0 0.1 1.6 μV/V POWER SUPPLY REJECTION RATIO PSRR VS = ±3 V to ±18 V 0.7 3.0 0.7 3.0 μV/V LARGE-SIGNAL VOLTAGE GAIN AVO RL ≥ 2 kΩ 5000 12,000 2000 6000 V/mV VO = ±10 V OUTPUT VOLTAGE SWING VO RL ≥ 10 kΩ ±13.5 ±14.0 ±13.5 ±14.0 V RL ≥ 2 kΩ ±12.5 ±13.0 ±12.5 ±13.0 RL ≥ 1 kΩ ±12.0 ±12.5 ±12.0 ±12.5 SLEW RATE2 SR RL ≥ 2 kΩ 0.1 0.3 0.1 0.3 V/μs CLOSED-LOOP BANDWIDTH2 BW AVCL + 1 0.4 0.6 0.4 0.6 MHz OPEN-LOOP OUTPUT RESISTANCE RO 60 60 Ω POWER CONSUMPTION Pd VS = ±15 V, no load 50 60 50 60 mW VS = ±3 V, no load 3.5 4.5 3.5 4.5 OFFSET ADJUSTMENT RANGE Rp = 20 kn ±3 ±3 mV 1 Long-term input offset voltage stability refers to the averaged trend line of VOS vs. time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in VOS during the first 30 operating days are typically 2.5 μV. 2 Sample tested. 3 Guaranteed by design. Rev. G | Page 3 of 16 Document Outline Features Pin Connections General Description Table of Contents Revision History Specifications Electrical Specifications Wafer Test Limits Typical Electrical Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Typical Performance Characteristics Test Circuits Applications Precision Current Sinks Outline Dimensions Ordering Guide