Datasheet OP471 (Analog Devices) - 3

OP471 (V ELECTRICAL CHARACTERISTICS s =
±
15 V, –25 C
£
TA
£
85 C for OP471E/F, –40 C
£
TA
£
85 for OP471G, unless otherwise noted.) OP471E OP471F OP471G Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit
Input Offset Voltage VOS 0.3 1.1 0.6 2.0 1.2 2.5 mV Average Input TCVOS 1 4 2 7 4 mV/∞C Offset Voltage Drift Input Offset Current los VCM = 0 V 5 20 8 40 20 50 nA Input Bias Current IB VCM = 0 V 13 50 25 70 40 75 nA Large-Signal VO = ± 10 V Voltage Gain Avo RL = 10 kW 375 600 200 400 200 400 V/mV RL = 2 kW 250 400 125 200 125 200 Input Voltage Range* IVR ±11 ±12 ±11 ±12 ±11 ±12 V Output Voltage Swing V ≥ O RL 2 kW ±12 ±13 ±12 ±13 ±12 ±13 V Common-Mode CMR VCM = ± 11 V 100 115 90 110 90 110 dB Rejection Power Supply PSRR VS = ±4.5 V to ± 18 V 3.2 10 18 31.6 18 31.6 mV/V Rejection Ratio Supply Current (All Amplifiers) ISY No Load 9.3 11 9.3 11 9.3 11 mA *Guaranteed by CMR test.
ABSOLUTE MAXIMUM RATINGS1 Package Type JA* JC Unit
Supply Voltage . ± 18 V Differential Input Voltage2 . ±1.0 V 14-Lead Hermetic DIP(Y) 94 10 ∞C/W Differential Input Current2 . ± 25 mW 14-Lead Plastic DIP(P) 76 33 ∞C/W Input Voltage . Supply Voltage Output Short-Circuit Duration . Continuous 16-Lead SOIC (S) 88 23 ∞C/W Storage Temperature Range *␪ P, Y-Package . –65∞C to +150∞C JA is specified for worst-case mounting conditions, i.e., ␪JA is specified for device in socket for TO, CERDIP, PDIP packages; ␪JA is specified for device soldered to Lead Temperature Range (Soldering, 60 sec) . 300∞C printed circuit board for SO packages. Junction Temperature (Ti) . –65∞C to +150∞C Operating Temperature Range
ORDERING GUIDE
OP471E, OP471F . –25∞C to +85∞C OP471G . –40∞C to +85∞C
TA = 25
∞
C Package Options Operating V
NOTES
OS MAX Temperature
1Absolute Maximum Ratings apply to packaged parts, unless otherwise noted.
(
m
V) 14-Lead CERDIP Plastic Range
2The OP471’s inputs are protected by back-to-back diodes. Current limiting 800 OP471EY IND resistors are not used in order to achieve low noise performance. If differential 1,500 OP471FY* IND voltage exceeds ± 1.0 V, the input current should be limited to ± 25 mA. 1,800 OP471GP XIND 1,800 OP471GS XIND *Not for new design. Obsolete April 2002. For military processed devices, please refer to the standard microcircuit drawing (SMD) available at
www.dscc.dla.mil/programs/milspec/default.asp
5962-88565022A - OP471ARCMDA 5962-88565023A - OP471ATCMDA 5962-8856502CA - OP471AYMDA
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although
WARNING!
the OP471 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
ESD SENSITIVE DEVICE
are recommended to avoid performance degradation or loss of functionality. REV. A –3–