Datasheet AD745 (Analog Devices) - 9

AD745 HOW CHIP PACKAGE TYPE AND POWER DISSIPATION 300 T AFFECT INPUT BIAS CURRENT A = 25 C
As with all JFET input amplifiers, the input bias current of the AD745 is a direct function of device junction temperature, IB approximately doubling every 10°C. Figure 9 shows the rela-
Amps – 200
tionship between bias current and junction temperature for the
JA = 165 C/W
AD745. This graph shows that lowering the junction tempera- ture will dramatically improve IB.
10–6 100 JA = 115 C/W VS = 15V TA = 25 C INPUT BIAS CURRENT 10–7 JA = 0 C/W Amps – 10–8 0 5 10 15 SUPPLY VOLTAGE – Volts 10–9
Figure 11. Input Bias Current vs. Supply Voltage for Various Values of θJA
10–10 TJ INPUT BIAS CURRENT 10–11 A (J TO DIE MOUNT) 10–12 –60 –40 –20 0 20 40 60 80 100 120 140 JUNCTION TEMPERATURE – C B (DIE MOUNT
Figure 9. Input Bias Current vs. Junction Temperature
TO CASE) TA
The dc thermal properties of an IC can be closely approximated by using the simple model of Figure 10 where current represents
A + B = JC CASE
power dissipation, voltage represents temperature, and resistors represent thermal resistance (θ in °C/watt). Figure 12. Breakdown of Various Package Thermal Resistance
T JC CA J REDUCED POWER SUPPLY OPERATION FOR JA LOWER I P T B IN A
Reduced power supply operation lowers IB in two ways: first, by lowering both the total power dissipation and, second, by reduc-
WHERE:
ing the basic gate-to-junction leakage (Figure 11). Figure 13
PIN = DEVICE DISSIPATION
shows a 40 dB gain piezoelectric transducer amplifier, which
TA = AMBIENT TEMPERATURE
operates without an ac coupling capacitor, over the –40°C to
TJ = JUNCTION TEMPERATURE
+85°C temperature range. If the optional coupling capacitor,
JC = THERMAL RESISTANCE – JUNCTION TO CASE CA = THERMAL RESISTANCE – CASE TO AMBIENT
C1, is used, this circuit will operate over the entire –55°C to +125°C temperature range. Figure 10. Device Thermal Model From this model T
100 10k
J = TA+θJA PIN. Therefore, IB can be deter- mined in a particular application by using Figure 9 together with
C1*
the published data for θ
108 CT** **
JA and power dissipation. The user can
+5V
modify θJA by use of an appropriate clip-on heat sink such as the Aavid #5801. Figure 11 shows bias current versus supply voltage
AD745 TRANSDUCER
with θJA as the third variable. This graph can be used to predict bias current after θJA has been computed. Again bias current will
CT 108 –5V
double for every 10°C.
*OPTIONAL DC BLOCKING CAPACITOR **OPTIONAL, SEE TEXT
Figure 13. A Piezoelectric Transducer REV. D –9–