Datasheet AD810 (Analog Devices) - 6
| Hersteller | Analog Devices |
| Beschreibung | Low Power Video Op Amp with Disable |
| Seiten / Seite | 22 / 6 — AD810. Data Sheet. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. OFFSET … |
| Revision | B |
| Dateiformat / Größe | PDF / 472 Kb |
| Dokumentensprache | Englisch |
AD810. Data Sheet. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. OFFSET NULL 1. DISABLE. –IN. +VS. +IN. TOP VIEW. OUTPUT. (Not to Scale)
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AD810 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS OFFSET NULL 1 8 DISABLE OFFSET NULL 1 8 DISABLE –IN AD810 2 7 +V AD810 S –IN 2 7 +VS +IN TOP VIEW 3 6 OUTPUT TOP VIEW (Not to Scale)
003
+IN 3 (Not to Scale) 6 OUTPUT –VS 4 5 OFSET NULL
101 1737-
–VS 4 5 OFSET NULL
1737- Figure 3. 8-Lead PDIP Pin Configuration Figure 5. 8-Lead SOIC Pin Configuration
OFFSET NULL 1 8 DISABLE –IN 2 AD810 7 +VS +IN 3 TOP VIEW 6 OUTPUT (Not to Scale)
100
–VS 4 5 OFSET NULL
1737- Figure 4. 8-Lead CERDIP Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1, 5 OFFSET NULL Inverting Input Offset Null Connection. See Figure 47. 2 −IN Inverting Input. 3 +IN Noninverting Input. 4 −VS Negative Supply Voltage. 6 OUTPUT Output. 7 +VS Positive Supply Voltage. 8 DISABLE Disable (Active Low). Rev. B | Page 6 of 22 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION GENERAL DESIGN CONSIDERATIONS ACHIEVING VERY FLAT GAIN RESPONSE AT HIGH FREQUENCY CHOICE OF FEEDBACK RESISTOR PRINTED CIRCUIT BOARD LAYOUT QUALITY OF COAXIAL CABLE POWER SUPPLY BYPASSING POWER SUPPLY OPERATING RANGE OFFSET NULLING DISABLE MODE APPLICATIONS INFORMATION CAPACITIVE LOADS OPERATION AS A VIDEO LINE DRIVER 2:1 VIDEO MULTIPLEXER 4:1 MULTIPLEXER OUTLINE DIMENSIONS ORDERING GUIDE
AD810 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS OFFSET NULL 1 8 DISABLE OFFSET NULL 1 8 DISABLE –IN AD810 2 7 +V AD810 S –IN 2 7 +VS +IN TOP VIEW 3 6 OUTPUT TOP VIEW (Not to Scale)
003
+IN 3 (Not to Scale) 6 OUTPUT –VS 4 5 OFSET NULL
101 1737-
–VS 4 5 OFSET NULL
1737- Figure 3. 8-Lead PDIP Pin Configuration Figure 5. 8-Lead SOIC Pin Configuration
OFFSET NULL 1 8 DISABLE –IN 2 AD810 7 +VS +IN 3 TOP VIEW 6 OUTPUT (Not to Scale)
100
–VS 4 5 OFSET NULL
1737- Figure 4. 8-Lead CERDIP Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1, 5 OFFSET NULL Inverting Input Offset Null Connection. See Figure 47. 2 −IN Inverting Input. 3 +IN Noninverting Input. 4 −VS Negative Supply Voltage. 6 OUTPUT Output. 7 +VS Positive Supply Voltage. 8 DISABLE Disable (Active Low). Rev. B | Page 6 of 22 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION GENERAL DESIGN CONSIDERATIONS ACHIEVING VERY FLAT GAIN RESPONSE AT HIGH FREQUENCY CHOICE OF FEEDBACK RESISTOR PRINTED CIRCUIT BOARD LAYOUT QUALITY OF COAXIAL CABLE POWER SUPPLY BYPASSING POWER SUPPLY OPERATING RANGE OFFSET NULLING DISABLE MODE APPLICATIONS INFORMATION CAPACITIVE LOADS OPERATION AS A VIDEO LINE DRIVER 2:1 VIDEO MULTIPLEXER 4:1 MULTIPLEXER OUTLINE DIMENSIONS ORDERING GUIDE