Datasheet AD8009 (Analog Devices)
Hersteller | Analog Devices |
Beschreibung | 1 GHz, 5,500 V/µs Low Distortion Amplifier |
Seiten / Seite | 16 / 1 — 1 GHz, 5,500 V/. Low Distortion Amplifier. AD8009. FEATURES. FUNCTIONAL … |
Revision | F |
Dateiformat / Größe | PDF / 296 Kb |
Dokumentensprache | Englisch |
1 GHz, 5,500 V/. Low Distortion Amplifier. AD8009. FEATURES. FUNCTIONAL BLOCK DIAGRAMS. Ultrahigh Speed. 8-Lead Plastic SOIC (R-8)
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1 GHz, 5,500 V/ s Low Distortion Amplifier AD8009 FEATURES FUNCTIONAL BLOCK DIAGRAMS Ultrahigh Speed 8-Lead Plastic SOIC (R-8) 5-Lead SOT-23 (RT-5) 5,500 V/ s Slew Rate, 4 V Step, G = +2 545 ps Rise Time, 2 V Step, G = +2 AD8009 AD8009 NC 1 8 NC Large Signal Bandwidth V 1 5 +V OUT S –IN 2 7 +V 440 MHz, G = +2 S +IN 3 6 OUT 2 320 MHz, G = +10 –VS Small Signal Bandwidth (–3 dB) –V 4 5 S NC +IN 3 4 –IN 1 GHz, G = +1 NC = NO CONNECT 700 MHz, G = +2 Settling Time 10 ns to 0.1%, 2 V Step, G = +2 PRODUCT DESCRIPTION Low Distortion over Wide Bandwidth
The AD8009 is an ultrahigh speed current feedback amplifier
SFDR
with a phenomenal 5,500 V/µs slew rate that results in a rise
–66 dBc @ 20 MHz, Second Harmonic
time of 545 ps, making it ideal as a pulse amplifier.
–75 dBc @ 20 MHz, Third Harmonic
The high slew rate reduces the effect of slew rate limiting and
Third Order Intercept (3IP)
results in the large signal bandwidth of 440 MHz required for
26 dBm @ 70 MHz, G = +10
high resolution video graphic systems. Signal quality is main-
Good Video Specifications
tained over a wide bandwidth with worst-case distortion of
Gain Flatness 0.1 dB to 75 MHz
–40 dBc @ 250 MHz (G = +10, 1 V p-p). For applications with
0.01% Differential Gain Error, RL = 150
multitone signals, such as IF signal chains, the third order
0.01 Differential Phase Error, RL = 150
intercept (3IP) of 12 dBm is achieved at the same frequency. This
High Output Drive
distortion performance coupled with the current feedback
175 mA Output Load Drive
architecture make the AD8009 a flexible component for a gain
10 dBm with –38 dBc SFDR @ 70 MHz, G = +10
stage amplifier in IF/RF signal chains.
Supply Operation
The AD8009 is capable of delivering over 175 mA of load current
+5 V to 5 V Voltage Supply
and will drive four back terminated video loads while maintaining
14 mA (Typ) Supply Current
low differential gain and phase error of 0.02% and 0.04°,
APPLICATIONS
respectively. The high drive capability is also reflected in the
Pulse Amplifier
ability to deliver 10 dBm of output power @ 70 MHz with
IF/RF Gain Stage/Amplifiers
–38 dBc SFDR.
High Resolution Video Graphics High Speed Instrumentations
The AD8009 is available in a small SOIC package and will
CCD Imaging Amplifier
operate over the industrial temperature range –40°C to +85°C. The AD8009 is also available in an SOT-23-5 and will operate
2 G = +2
over the commercial temperature range of 0°C to 70°C.
1 RF = 301 RL = 150 0 –30 G = 2 R –1 F = 301 V –40 V O = 2V p-p O = 2V p-p G = +10 –2 RF = 200 SECOND R –50 –3 L = 100 100 LOAD –4 –60 SECOND –5 TION (dBc) 150 LOAD NORMALIZED GAIN (dB) OR –70 –6 DIST THIRD –7 –80 100 LOAD –8 1 10 100 1000 –90 THIRD 150 FREQUENCY RESPONSE (MHz) LOAD –100
Figure 1. Large Signal Frequency Response; G = +2 and +10
1 10 70
REV. F
FREQUENCY RESPONSE (MHz)
Information furnished by Analog Devices is believed to be accurate and Figure 2. Distortion vs. Frequency; G = +2 reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise
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under any patent or patent rights of Analog Devices. Trademarks and
Tel: 781/329-4700 www.analog.com
registered trademarks are the property of their respective owners.
Fax: 781/326-8703 © 2004 Analog Devices, Inc. All rights reserved.
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAMS PRODUCT DESCRIPTION SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ORDERING GUIDE Typical Performance Characteristics APPLICATIONS RF Filter Driver RGB Monitor Driver Driving a Capacitive Load OUTLINE DIMENSIONS Revision History